Line 4,448: |
Line 4,448: |
| | unsigned, Clear texture cache (0 = don't clear, 1 = clear) | | | unsigned, Clear texture cache (0 = don't clear, 1 = clear) |
| |- | | |- |
− | | 17 | + | | 17-31 |
| | 0x0 | | | 0x0 |
| |} | | |} |
| + | |
| + | This register is used to enable texture units. |
| | | |
| Texture 3 coordinates values: | | Texture 3 coordinates values: |
Line 4,499: |
Line 4,501: |
| | unsigned, Alpha | | | unsigned, Alpha |
| |} | | |} |
| + | |
| + | This register is used to set a texture unit's border color. |
| | | |
| === GPUREG_TEXUNIT''i''_DIM === | | === GPUREG_TEXUNIT''i''_DIM === |
Line 4,512: |
Line 4,516: |
| | unsigned, Width | | | unsigned, Width |
| |} | | |} |
| + | |
| + | This register is used to set a texture unit's dimensions. |
| | | |
| === GPUREG_TEXUNIT''i''_PARAM === | | === GPUREG_TEXUNIT''i''_PARAM === |
Line 4,534: |
Line 4,540: |
| | unsigned, Wrap S | | | unsigned, Wrap S |
| |- | | |- |
− | | 16 | + | | 16-17 |
| | 0x0 | | | 0x0 |
| |- | | |- |
Line 4,546: |
Line 4,552: |
| | unsigned, Type (Texture 0 only) | | | unsigned, Type (Texture 0 only) |
| |} | | |} |
| + | |
| + | This register is used to set a texture unit's extra parameters. |
| | | |
| Filter values: | | Filter values: |
Line 4,619: |
Line 4,627: |
| | unsigned, Min Level | | | unsigned, Min Level |
| |} | | |} |
| + | |
| + | This register is used to configure a texture unit's level of detail. |
| | | |
| === GPUREG_TEXUNIT''i''_ADDR''i'' === | | === GPUREG_TEXUNIT''i''_ADDR''i'' === |
Line 4,639: |
Line 4,649: |
| | unsigned, Texture physical address >> 3 (upper 6 bits reused from first ADDR register) | | | unsigned, Texture physical address >> 3 (upper 6 bits reused from first ADDR register) |
| |} | | |} |
| + | |
| + | This register is used to set a texture unit's physical address(es) in memory. |
| | | |
| If the texture is a cube: | | If the texture is a cube: |
Line 4,679: |
Line 4,691: |
| | fixed0.0.24, Z bias (upper 23 bits) | | | fixed0.0.24, Z bias (upper 23 bits) |
| |} | | |} |
| + | |
| + | This register is used to set a texture unit's shadow texture properties. |
| | | |
| === GPUREG_TEXUNIT''i''_TYPE === | | === GPUREG_TEXUNIT''i''_TYPE === |
Line 4,689: |
Line 4,703: |
| | unsigned, [[GPU_Textures#Texture_color_types|Format]] | | | unsigned, [[GPU_Textures#Texture_color_types|Format]] |
| |} | | |} |
| + | |
| + | This register is used to set a texture unit's data format. |
| | | |
| === GPUREG_LIGHTING_ENABLE0 === | | === GPUREG_LIGHTING_ENABLE0 === |
Line 4,699: |
Line 4,715: |
| | unsigned, Enabled (0 = disabled, 1 = enabled) | | | unsigned, Enabled (0 = disabled, 1 = enabled) |
| |} | | |} |
| + | |
| + | This register is used to enable lighting. |
| | | |
| === GPUREG_TEXUNIT3_PROCTEX0 === | | === GPUREG_TEXUNIT3_PROCTEX0 === |
Line 4,733: |
Line 4,751: |
| | float1.5.10, Texture bias (lower 8 bits) | | | float1.5.10, Texture bias (lower 8 bits) |
| |} | | |} |
| + | |
| + | This register is used to configure the procedural texture unit. |
| | | |
| Clamp values: | | Clamp values: |
Line 4,821: |
Line 4,841: |
| | float1.5.10, U-direction noise phase | | | float1.5.10, U-direction noise phase |
| |} | | |} |
| + | |
| + | This register is used to configure the procedural texture unit's U-direction noise amplitude/phase. |
| | | |
| === GPUREG_TEXUNIT3_PROCTEX2 === | | === GPUREG_TEXUNIT3_PROCTEX2 === |
Line 4,834: |
Line 4,856: |
| | float1.5.10, V-direction noise phase | | | float1.5.10, V-direction noise phase |
| |} | | |} |
| + | |
| + | This register is used to configure the procedural texture unit's V-direction noise amplitude/phase. |
| | | |
| === GPUREG_TEXUNIT3_PROCTEX3 === | | === GPUREG_TEXUNIT3_PROCTEX3 === |
Line 4,847: |
Line 4,871: |
| | float1.5.10, V-direction noise frequency | | | float1.5.10, V-direction noise frequency |
| |} | | |} |
| + | |
| + | This register is used to configure the procedural texture unit's U-direction and V-direction noise frequency. |
| | | |
| === GPUREG_TEXUNIT3_PROCTEX4 === | | === GPUREG_TEXUNIT3_PROCTEX4 === |
Line 4,866: |
Line 4,892: |
| | float1.5.10, Texture bias (upper 8 bits) | | | float1.5.10, Texture bias (upper 8 bits) |
| |} | | |} |
| + | |
| + | This register is used to configure the procedural texture unit. |
| | | |
| Minification filter values: | | Minification filter values: |
Line 4,904: |
Line 4,932: |
| | 0xE0C080 | | | 0xE0C080 |
| |} | | |} |
| + | |
| + | This register is used to set the procedural texture unit's offset. |
| | | |
| === GPUREG_PROCTEX_LUT === | | === GPUREG_PROCTEX_LUT === |
Line 4,917: |
Line 4,947: |
| | unsigned, Reference table | | | unsigned, Reference table |
| |} | | |} |
| + | |
| + | This register is used to set which look-up table to write to, with GPUREG_PROCTEX_LUT_DATA''i'', at what index. |
| | | |
| Reference table values: | | Reference table values: |
Line 5,058: |
Line 5,090: |
| | unsigned, Alpha source 2 | | | unsigned, Alpha source 2 |
| |} | | |} |
| + | |
| + | This register configures a texture combiner's sources. |
| | | |
| Source values: | | Source values: |
Line 5,120: |
Line 5,154: |
| | unsigned, Alpha operand 2 | | | unsigned, Alpha operand 2 |
| |} | | |} |
| + | |
| + | This register configures a texture combiner's operands. |
| | | |
| RGB operand values: | | RGB operand values: |
Line 5,201: |
Line 5,237: |
| | unsigned, Alpha combine | | | unsigned, Alpha combine |
| |} | | |} |
| + | |
| + | This register configures a texture combiner's combine mode. |
| | | |
| Combine values: | | Combine values: |
Line 5,257: |
Line 5,295: |
| | unsigned, Alpha | | | unsigned, Alpha |
| |} | | |} |
| + | |
| + | This register configures a texture combiner's constant color. |
| | | |
| === GPUREG_TEXENV''i''_SCALE === | | === GPUREG_TEXENV''i''_SCALE === |
Line 5,270: |
Line 5,310: |
| | unsigned, Alpha scale | | | unsigned, Alpha scale |
| |} | | |} |
| + | |
| + | This register configures a texture combiner's scale value. |
| | | |
| Scale values: | | Scale values: |
Line 5,330: |
Line 5,372: |
| |} | | |} |
| | | |
− | This register is shared between the gas/fog mode configuration and TexEnv buffer inputs. TexEnv buffer inputs are typically written with a mask of 0x2, and the gas/fog mode configuration is typically written with a mask of 0x5. | + | This register is shared between the gas/fog mode configuration and texture combiner buffer inputs. Texture combiner buffer inputs are typically written with a mask of 0x2, and the gas/fog mode configuration is typically written with a mask of 0x5. |
| | | |
| Fog mode values: | | Fog mode values: |
Line 5,389: |
Line 5,431: |
| | unsigned, Blue | | | unsigned, Blue |
| |} | | |} |
| + | |
| + | This register is used to configure the color of fog. |
| | | |
| === GPUREG_GAS_ATTENUATION === | | === GPUREG_GAS_ATTENUATION === |
Line 5,399: |
Line 5,443: |
| | float1.5.10, Gas density attenuation | | | float1.5.10, Gas density attenuation |
| |} | | |} |
| + | |
| + | This register is used to configure the gas density attenuation. |
| | | |
| === GPUREG_GAS_ACCMAX === | | === GPUREG_GAS_ACCMAX === |
Line 5,409: |
Line 5,455: |
| | float1.5.10, Gas maximum density accumulation | | | float1.5.10, Gas maximum density accumulation |
| |} | | |} |
| + | |
| + | This register is used to configure the gas maximum density accumulation. |
| | | |
| === GPUREG_FOG_LUT_INDEX === | | === GPUREG_FOG_LUT_INDEX === |
Line 5,419: |
Line 5,467: |
| | unsigned, Index | | | unsigned, Index |
| |} | | |} |
| + | |
| + | This register is used to set what index to write to with GPUREG_FOG_LUT_DATA''i''. |
| | | |
| === GPUREG_FOG_LUT_DATA''i'' === | | === GPUREG_FOG_LUT_DATA''i'' === |
Line 5,464: |
Line 5,514: |
| | unsigned, Alpha | | | unsigned, Alpha |
| |} | | |} |
| + | |
| + | This register is used to configure the texture combiner buffer color. |
| | | |
| == Framebuffer registers == | | == Framebuffer registers == |