Difference between revisions of "CONFIG9 Registers"
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== 0x10000000, Hidden bootrom off-switch == | == 0x10000000, Hidden bootrom off-switch == | ||
| − | ARM9 | + | The ARM9 and ARM11 [[Memory_layout|bootroms]](+0x8000) are disabled by writing 1 to (u8*)0x10000000 and 1 to (u8*)0x10000001?(These two registers are written by the ARM9) |
Writing values here(u8 0x10000000+0) sets the specified bitmask. Thus, writing value 0x2 when the register(u8 0x10000000+0) was previously set to value 0x1 changes the value to 0x3. During the NATIVE_FIRM ARM9 kernel startup, it will check if bitmask 0x2 in this register is set. If that bitmask is not set, the console-unique portions of the two console-unique TWL [[AES|keyslots]] are then initialized. The kernel then writes value 0x2 to this register, regardless of the previous bitmask value(due to this, the console-unique TWL key-data init is only done at hard-boot). | Writing values here(u8 0x10000000+0) sets the specified bitmask. Thus, writing value 0x2 when the register(u8 0x10000000+0) was previously set to value 0x1 changes the value to 0x3. During the NATIVE_FIRM ARM9 kernel startup, it will check if bitmask 0x2 in this register is set. If that bitmask is not set, the console-unique portions of the two console-unique TWL [[AES|keyslots]] are then initialized. The kernel then writes value 0x2 to this register, regardless of the previous bitmask value(due to this, the console-unique TWL key-data init is only done at hard-boot). | ||
Revision as of 18:13, 7 March 2014
Registers
| NAME | PHYSICAL ADDRESS | WIDTH |
|---|---|---|
| ? | 0x10000000 | 1 |
| ? | 0x10000001 | 1 |
| ? | 0x10000004 | 4 |
| REG_CARDCONF | 0x1000000C | 2 |
| ? | 0x10000010 | 1 |
| ? | 0x10010000 | 4 |
| REG_UNITINFO | 0x10010010 | 1 |
REG_CARDCONF
| Bit | Description |
|---|---|
| 1-0 | Gamecard active controller select (0=NTRCARD, 1=?, 2=CTRCARD1, 3=CTRCARD2) |
| 8 | ? |
Depending on the gamecard controller that has been selected, one of the following gamecard registers will become active:
- Selecting NTRCARD will activate the register space at 0x10164000.
- Selecting CTRCARD1 will activate the register space at 0x10004000.
- Selecting CTRCARD2 will activate the register space at 0x10005000.
0x10000000, Hidden bootrom off-switch
The ARM9 and ARM11 bootroms(+0x8000) are disabled by writing 1 to (u8*)0x10000000 and 1 to (u8*)0x10000001?(These two registers are written by the ARM9)
Writing values here(u8 0x10000000+0) sets the specified bitmask. Thus, writing value 0x2 when the register(u8 0x10000000+0) was previously set to value 0x1 changes the value to 0x3. During the NATIVE_FIRM ARM9 kernel startup, it will check if bitmask 0x2 in this register is set. If that bitmask is not set, the console-unique portions of the two console-unique TWL keyslots are then initialized. The kernel then writes value 0x2 to this register, regardless of the previous bitmask value(due to this, the console-unique TWL key-data init is only done at hard-boot).
0x10010000
Initially this is value zero. NATIVE_FIRM writes value 1 here when a FIRM launch begins. The LGY FIRM writes value 3 here when handling PXI command 0x00020080(first TWL PXI command), it also writes value 7 here when handling PXI command 0x00030080(first AGB PXI command). This register can be read to determine what "mode" the system is running under: hard-boot, FIRM launch, or TWL/AGB FIRM.
REG_UNITINFO
This 8-bit register is value zero for retail, non-zero for dev/debug units.