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Line 38:
Line 38: − +
→0x1EF00X90
== 0x1EF00X90 ==
== 0x1EF00X90 ==
This register seems to control how the LCD framebuffer is displayed?
This register controls how the LCD framebuffer is displayed.
== Framebuffers ==
== Framebuffers ==
The GSP module DMAs LCD framebuffers from the GSP module heap in FCRAM into VRAM. These framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)
The GSP module DMAs LCD framebuffers from the GSP module heap in FCRAM into VRAM. These framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)