3DS NDMA has 8 channels. The first 0x100-bytes of this IO mem is mirrored at 0x10002100, repeated every 0x100-bytes until the end of the 0x1000-byte IO mem. NDMA can access the ARM9 bootrom, including the protected part before it is locked out.
+
3DS NDMA has 8 channels. The first 0x100-bytes of this IO mem is mirrored at 0x10002100, repeated every 0x100-bytes until the end of the 0x1000-byte IO mem. NDMA can access the Arm9 bootrom, including the protected part before it is locked out.
= Registers =
= Registers =
Line 136:
Line 136:
! Bit
! Bit
! Description
! Description
+
|-
+
| 4-0
+
| Device to device startup mode
|-
|-
| 11-10
| 11-10
Line 168:
Line 171:
|}
|}
−
== Startup modes (27-24) ==
+
== Startup modes (4-0) ==
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Value
! Value
Line 192:
Line 195:
|-
|-
| 6
| 6
−
| MMC1
+
| SDIO1
|-
|-
| 7
| 7
−
| MMC2?
+
| SDIO3
|-
|-
| 8
| 8
Line 207:
Line 210:
|-
|-
| 11
| 11
−
| SHA out ([[SHA_Registers#SHA_FIFO|INFIFO]])
+
| SHA out ([[SHA_Registers#SHA_FIFO|INFIFO]], source data readback mode)
|-
|-
| 12
| 12
−
| ?
+
| NTRCARD
|-
|-
| 13
| 13
Line 219:
Line 222:
|-
|-
| 15
| 15
−
| Boot9 Uses this to copy from the AES out FIFO to the SHA in FIFO