Line 8: |
Line 8: |
| |- | | |- |
| | 0x00010000 | | | 0x00010000 |
− | | This loads [[CONFIG11 Registers|CFG11_PTM_0]] and [[CONFIG11 Registers|CFG11_PTM_1]], then writes them to cmdreplyword[2] and cmdreplyword[3]. | + | | GetWakeStatus. This loads [[PDN Registers#PDN_WAKE_ENABLE|PDN_WAKE_ENABLE]] and [[PDN Registers#PDN_WAKE_REASON|PDN_WAKE_REASON]], then writes them to cmdreplyword[2] and cmdreplyword[3]. |
| |- | | |- |
| | 0x00020080 | | | 0x00020080 |
− | | [[CONFIG11 Registers|CFG11_PTM_1]] = cmdword[2] & cmdword[1]. This then writes cmdword[1] to [[CONFIG11 Registers|CFG11_PTM_0]]. [[CONFIG11 Registers|CFG11_PTM_1]] = cmdword[2] & ~cmdword[1]. | + | | ConfigureWakeEvents. [[PDN Registers#PDN_WAKE_REASON|PDN_WAKE_REASON]] = cmdword[2] & cmdword[1]. This then writes cmdword[1] to [[PDN Registers#PDN_WAKE_ENABLE|PDN_WAKE_ENABLE]]. [[PDN Registers#PDN_WAKE_REASON|PDN_WAKE_REASON]] = cmdword[2] & ~cmdword[1]. |
| |- | | |- |
| | 0x00030040 | | | 0x00030040 |
− | | This writes cmdword[1] to [[CONFIG11 Registers|CFG11_PTM_1]]. | + | | Acknowledge. Writes cmdword[1] to [[PDN Registers#PDN_WAKE_REASON|PDN_WAKE_REASON]]. |
| |} | | |} |
| | | |
Line 34: |
Line 34: |
| |- | | |- |
| | 0x00010040 | | | 0x00010040 |
− | | This sets bit0 in [[CONFIG11 Registers#CFG11_CODEC_CNT|CFG11_CODEC_CNT]] to u8 cmd+4. | + | | This sets bit0 in [[PDN Registers#PDN_CODEC_CNT|PDN_CODEC_CNT]] to u8 cmd+4. |
| |- | | |- |
| | 0x00020040 | | | 0x00020040 |
− | | This sets bit1 in [[CONFIG11 Registers#CFG11_CODEC_CNT|CFG11_CODEC_CNT]] to u8 cmd+4. | + | | This sets bit1 in [[PDN Registers#PDN_CODEC_CNT|PDN_CODEC_CNT]] to u8 cmd+4. |
| |} | | |} |
| | | |
Line 47: |
Line 47: |
| |- | | |- |
| | 0x000100C0 | | | 0x000100C0 |
− | | (bool enableClock, bool resetEngines, bool resetVram) Enables and/or resets the GPU, see [[CONFIG11 Registers#CFG11_GPU_CNT|CFG11_GPU_CNT]] | + | | (bool enableClock, bool resetEngines, bool resetRegisters) Enables and/or resets the GPU, see [[PDN Registers#PDN_GPU_CNT|PDN_GPU_CNT]] |
| |} | | |} |
| | | |
Line 57: |
Line 57: |
| |- | | |- |
| | 0x00010040 | | | 0x00010040 |
− | | This sets bit0 in [[CONFIG11 Registers#CFG11_CAMERA_CNT|CFG11_CAMERA_CNT]] to u8 cmd+4. | + | | This sets bit0 in [[PDN Registers#PDN_CAMERA_CNT|PDN_CAMERA_CNT]] to u8 cmd+4. |
| |- | | |- |
| | 0x000200000 | | | 0x000200000 |
− | | This writes [[CONFIG11 Registers#CFG11_CAMERA_CNT|CFG11_CAMERA_CNT]] & 1 to u8 cmdreply+8. | + | | This writes [[PDN Registers#PDN_CAMERA_CNT|PDN_CAMERA_CNT]] & 1 to u8 cmdreply+8. |
| |} | | |} |