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ARM11 Interrupts (edit)

Revision as of 02:30, 27 May 2020

5 bytes added ,  02:30, 27 May 2020
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The Arm11 kernel configures interrupts the following way:
 
The Arm11 kernel configures interrupts the following way:
   −
<code>Interrupts 0x00 to 0x1F: edge-triggered, N-N
+
<nowiki>Interrupts 0x00 to 0x1F: edge-triggered, N-N
 
Interrupt 0x20: level-sensitive, 1-N
 
Interrupt 0x20: level-sensitive, 1-N
 
Interrupt 0x21: level-sensitive, 1-N
 
Interrupt 0x21: level-sensitive, 1-N
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Interrupt 0x7b: level-sensitive, 1-N
 
Interrupt 0x7b: level-sensitive, 1-N
 
Interrupt 0x7c: level-sensitive, 1-N
 
Interrupt 0x7c: level-sensitive, 1-N
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Interrupt 0x7d: level-sensitive, 1-N</code>
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Interrupt 0x7d: level-sensitive, 1-N</nowiki>
    
= InterruptData =
 
= InterruptData =
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