Line 11: |
Line 11: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A9 | | | A9 |
− | | [[CONFIG Registers]] | + | | [[CONFIG9 Registers]] |
| | 0x10000000 | | | 0x10000000 |
| | Boot9, Process9 | | | Boot9, Process9 |
Line 28: |
Line 28: |
| | 0x10002000 | | | 0x10002000 |
| | Boot9, Process9 | | | Boot9, Process9 |
− | | DMA Engine | + | | AHB DMA Engine |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 49: |
Line 49: |
| | 0x10006000 / 0x10007000 | | | 0x10006000 / 0x10007000 |
| | Boot9, Process9, NewKernel9Loader | | | Boot9, Process9, NewKernel9Loader |
− | | 0x10007000 is normally not enabled on retail, all-zeros when read. | + | | SD(IO) controller 1 and 3. 3 is normally mapped to ARM11. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 84: |
Line 84: |
| | 0x1000C000 | | | 0x1000C000 |
| | Boot9, Kernel9 | | | Boot9, Kernel9 |
− | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330] (single-channel). | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (AXI busmaster, two channels, uses 32-bit bus width instead of 64). |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 123: |
Line 123: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | Debug WIFI SDIO Registers? | + | | TMIO SD(IO) controller 3 |
| | 0x10100000 | | | 0x10100000 |
| | | | | |
− | | An SDIO controller is mapped here, NWM references this controller but doesn't have access to it. | + | | NWM references this controller but doesn't have access to it. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 133: |
Line 133: |
| | 0x10101000 | | | 0x10101000 |
| | [[Filesystem services]] | | | [[Filesystem services]] |
− | | | + | | These registers function the same as the [[SHA Registers]], with the exception of the FIFO being located at 0x10301000. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 144: |
Line 144: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[CSND Registers]] / [[DSP Registers]] | + | | [[CSND Registers]] |
| | 0x10103000 | | | 0x10103000 |
| | TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]] | | | TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]] |
− | | Sound hardware. For DSP regs, see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help. | + | | Sound hardware. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | LGYFB0 | + | | [[MTX_Registers|LgyFb bottom screen]] |
| | 0x10110000 | | | 0x10110000 |
| | TwlBg | | | TwlBg |
Line 158: |
Line 158: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | LGYFB1 | + | | [[MTX_Registers|LgyFb top screen]] |
| | 0x10111000 | | | 0x10111000 |
| | TwlBg | | | TwlBg |
Line 214: |
Line 214: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[PDN Registers]] | + | | [[CONFIG11 Registers]] |
| | 0x10140000 | | | 0x10140000 |
| | Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]] | | | Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]] |
− | | Power management. | + | | System configuration. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 249: |
Line 249: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[CODEC Registers]] | + | | [[I2S Registers]] |
| | 0x10145000 | | | 0x10145000 |
− | | TwlBg, [[Codec Services]] | + | | TwlBg, AgbBg, [[Codec Services]] |
− | | | + | | Sound input/output lines |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 385: |
Line 385: |
| | 0x10200000 | | | 0x10200000 |
| | Boot11, Kernel11 | | | Boot11, Kernel11 |
− | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330]. Only used by bootrom on New3DS. | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (eight channels). Only used by bootrom on New3DS. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
− | | ? | + | | FCRAM configuration |
| | 0x10201000 | | | 0x10201000 |
− | | TwlBg | + | | TwlBg, Kernel11 (dead code) |
| | | | | |
| |- | | |- |
Line 406: |
Line 406: |
| | 0x10203000 | | | 0x10203000 |
| | [[DSP Services]] | | | [[DSP Services]] |
− | | | + | | see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help. |
− | |- | + | |-style="border-top: double" |
− | | style="background: green" | Yes | + | | style="background: red" | No |
| | A11 | | | A11 |
| | ? | | | ? |
| | 0x10204000 | | | 0x10204000 |
| + | | ? |
| | | | | |
− | |
| + | |- |
− | |-style="border-top: double" | |
| | style="background: red" | No | | | style="background: red" | No |
| | A11 | | | A11 |
Line 420: |
Line 420: |
| | 0x10206000 | | | 0x10206000 |
| | NewKernel11 | | | NewKernel11 |
− | | CDMA was moved (mirrored?) here on New 3DS. [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330]. | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330 r1p2] (eight channels). This is the DMA engine actually being used by the New3DS ARM11 kernel. |
| |- | | |- |
| | style="background: red" | No | | | style="background: red" | No |
Line 434: |
Line 434: |
| | 0x1020F000 | | | 0x1020F000 |
| | TwlBg, [[GSP Services]] | | | TwlBg, [[GSP Services]] |
− | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0422a/CHDGHIID.html CoreLink™ NIC-301 r1p0]. | + | | [https://developer.arm.com/documentation/ddi0422/d/programmers-model/register-summary CoreLink™ NIC-301 r1p2]. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
− | | DMA region | + | | AHB (or AXI?) FIFOs region |
− | | 0x10300000-0x10400000 | + | | 0x10300000-0x10340000 |
| | | | | |
− | | CDMA wants these addresses. Each page in this region corresponds to the same page in the 0x10100000-0x10200000 region. It is unknown if this is just a separate bus and/or if there are any differences in the registers. | + | | Pages present in this region correspond to the same respective devices in the 0x10100000-0x10140000 region but don't hold the same registers. They hold the FIFOs instead: the HASH FIFO register is located at 0x10301000. The LgyFb scaler data FIFO are located at 0x10310000 (top) and 0x10311000 (bot), etc. Needed for DMA. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |