Line 8: |
Line 8: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | ? | + | | [[#REG_SPICARDCNT|REG_SPICARDCNT]] |
| | 0x1000D800 | | | 0x1000D800 |
| | 4 | | | 4 |
Line 20: |
Line 20: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | ? | + | | [[#REG_SPICARDSIZE|REG_SPICARDSIZE]] |
| | 0x1000D808 | | | 0x1000D808 |
| | 4 | | | 4 |
Line 26: |
Line 26: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | REG_SPICARDFIFO | + | | [[#REG_SPICARDFIFO|REG_SPICARDFIFO]] |
| | 0x1000D80C | | | 0x1000D80C |
| | 4 | | | 4 |
Line 32: |
Line 32: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | ? | + | | [[#REG_SPICARDFIFOSTAT|REG_SPICARDFIFOSTAT]] |
| | 0x1000D810 | | | 0x1000D810 |
| | 4 | | | 4 |
Line 54: |
Line 54: |
| | 4 | | | 4 |
| | | | | |
| + | |} |
| + | |
| + | == REG_SPICARDCNT == |
| + | {| class="wikitable" border="1" |
| + | ! BIT |
| + | ! DESCRIPTION |
| + | |- |
| + | | 5-0 |
| + | | [[Filesystem_services#CardSpiBaudRate|Baud Rate]] |
| + | |- |
| + | | 12 |
| + | | [[Filesystem_services#CardSpiBusMode|Bus Mode]] |
| + | |- |
| + | | 13 |
| + | | Transfer Mode (0 = read, 1 = write) |
| + | |- |
| + | | 15 |
| + | | Trigger (0 = idle, 1 = busy) |
| + | |} |
| + | |
| + | == REG_SPICARDSIZE == |
| + | {| class="wikitable" border="1" |
| + | ! BIT |
| + | ! DESCRIPTION |
| + | |- |
| + | | 31-0 |
| + | | Transfer size |
| + | |} |
| + | |
| + | == REG_SPICARDFIFO == |
| + | {| class="wikitable" border="1" |
| + | ! BIT |
| + | ! DESCRIPTION |
| + | |- |
| + | | 31-0 |
| + | | Data |
| + | |} |
| + | |
| + | == REG_SPICARDFIFOSTAT == |
| + | {| class="wikitable" border="1" |
| + | ! BIT |
| + | ! DESCRIPTION |
| + | |- |
| + | | 0 |
| + | | FIFO Full (0 = not full, 1 = full) |
| |} | | |} |