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Cleaning up
= Registers =
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Old3dS
! Old3DS
! Name
! Name
! Address
! Address
! Width
! Width
! Used by
|-
|-
| Yes
| Yes
| REG_SYSPROT9
| [[#CFG_SYSPROT9|CFG_SYSPROT9]]
| 0x10000000
| 0x10000000
| 1
| 1
| Boot9
|-
|-
| Yes
| Yes
| REG_SYSPROT11
| [[#CFG_SYSPROT11|CFG_SYSPROT11]]
| 0x10000001
| 0x10000001
| 1
| 1
| Boot9
|-
|-
| Yes
| Yes
| REG_DEBUGUNIT
| CFG_DEBUGUNIT
| 0x10000004
| 0x10000004
| 4
| 4
|
|-
|-
| Yes
| Yes
| REG_CARDCONF
| [[#CFG_CARDCONF|CFG_CARDCONF]]
| 0x1000000C
| 0x1000000C
| 2
| 2
|
|-
|-
| Yes
| Yes
| REG_DEBUGGER
| CFG_DEBUGGER
| 0x10000010
| 0x10000010
| 1
| 1
|
|-
|-
| Yes
| Yes
| 0x10000011
| 0x10000011
| 1
| 1
|
|-
|-
| Yes
| Yes
| 0x10000012
| 0x10000012
| 2
| 2
|
|-
|-
| Yes
| Yes
| 0x10000014
| 0x10000014
| 2
| 2
|
|-
|-
| Yes
| Yes
| 0x10000020
| 0x10000020
| 2
| 2
|
|-
|-
| Yes
| Yes
| 0x10000100
| 0x10000100
| 2
| 2
|
|-
|-
| No
| No
| REG_EXTMEMCNT9
| [[#CFG_EXTMEMCNT9|CFG_EXTMEMCNT9]]
| 0x10000200
| 0x10000200
| 1
| 1
| Kernel9
|-
|-
| Yes
| Yes
| REG_MPCORECFG?
| CFG_MPCORECFG?
| 0x10000FFC
| 0x10000FFC
| 4
| 4
|
|-
|-
| Yes
| Yes
| REG_BOOTENV
| [[#CFG_BOOTENV|CFG_BOOTENV]]
| 0x10010000
| 0x10010000
| 4
| 4
|
|-
|-
| Yes
| Yes
| REG_UNITINFO
| [[#CFG_UNITINFO|CFG_UNITINFO]]
| 0x10010010
| 0x10010010
| 1
| 1
|
|-
|-
| Yes
| Yes
| 0x10010014
| 0x10010014
| 1
| 1
|
|}
|}
== REG_SYSPROT9 ==
==CFG_SYSPROT9 ==
Writing values to SYSPROT sets the specified bitmask. The ARM9 [[Memory_layout|bootrom]](+0x8000) is disabled by writing bit0. bit1 is used by NATIVE_FIRM to make sure console-unique TWL AES-keys are only set at hard-boot. It is not possible to set any other bits.
Writing values to SYSPROT sets the specified bitmask. The ARM9 [[Memory_layout|bootrom]](+0x8000) is disabled by writing bit0. bit1 is used by NATIVE_FIRM to make sure console-unique TWL AES-keys are only set at hard-boot. It is not possible to set any other bits.
From disassembly of the New3DS process9, it appears that setting bit1 disables the 0x10012000+ region.
From disassembly of the New3DS process9, it appears that setting bit1 disables the 0x10012000+ region.
== REG_SYSPROT11 ==
== CFG_SYSPROT11 ==
ARM11 bootrom (+0x8000) is disabled by writing bit0. It is not possible to set any other bits.
ARM11 bootrom (+0x8000) is disabled by writing bit0. It is not possible to set any other bits.
== REG_CARDCONF ==
== CFG_CARDCONF ==
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Bit
! Bit
* Selecting CTRCARD2 will activate the register space at [[CTRCARD|0x10005000]].
* Selecting CTRCARD2 will activate the register space at [[CTRCARD|0x10005000]].
== REG_EXTMEMCNT9 ==
== CFG_EXTMEMCNT9 ==
This register is presumably New3DS-only. Only bit0 is writable: 0 = disable New3DS ARM9 memory at 0x08100000 size 0x80000, 1 = enable.
This register is presumably New3DS-only. Only bit0 is writable: 0 = disable New3DS ARM9 memory at 0x08100000 size 0x80000, 1 = enable.
The data in this extended memory doesn't change when disabling the memory, then re-enabling the memory. Reading this extended memory while disabled results in zeros.
The data in this extended memory doesn't change when disabling the memory, then re-enabling the memory. Reading this extended memory while disabled results in zeros.
== REG_BOOTENV ==
== CFG_BOOTENV ==
Initially this is value zero. NATIVE_FIRM writes value 1 here when a FIRM launch begins. The [[Legacy_FIRM_PXI|LGY]] FIRM writes value 3 here when handling PXI command 0x00020080(first TWL PXI command), it also writes value 7 here when handling PXI command 0x00030080(first AGB PXI command). This register can be read to determine what "mode" the system is running under: hard-boot, FIRM launch, or TWL/AGB FIRM.
Initially this is value zero. NATIVE_FIRM writes value 1 here when a FIRM launch begins. The [[Legacy_FIRM_PXI|LGY]] FIRM writes value 3 here when handling PXI command 0x00020080(first TWL PXI command), it also writes value 7 here when handling PXI command 0x00030080(first AGB PXI command). This register can be read to determine what "mode" the system is running under: hard-boot, FIRM launch, or TWL/AGB FIRM.
It is unknown if this register controls anything.
It is unknown if this register controls anything.
== REG_UNITINFO ==
== CFG_UNITINFO ==
This 8-bit register is value zero for retail, non-zero for dev/debug units.
This 8-bit register is value zero for retail, non-zero for dev/debug units.