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Line 3,826:
Line 3,826: − − ==== GPUREG_VSH_CODE_CONFIG ==== − − {| class="wikitable" border="1" − ! Bits − ! Description − |- − | 0-11 − | Target vertex shader code offset for data transfer. − |} − − This register is used to set the offset at which upcoming vertex shader code data transferred through [[#GPUREG_VSH_CODE_DATA|GPUREG_VSH_CODE_DATA]] should be written. − − NOTE : as we do not yet know what a shader program's maximum size is yet, we also do not know how many bits the code offset parameter holds. The biggest shader binary observed so far was 2422 instructions long.
removed duplicate GPUREG_VSH_CODE_CONFIG
** third word : XXXXXXYY
** third word : XXXXXXYY
* In the case of float32 transfer mode, data should be sent by writing four words which are each the float32 value of the uniform register's 4 components, in the reverse order.
* In the case of float32 transfer mode, data should be sent by writing four words which are each the float32 value of the uniform register's 4 components, in the reverse order.
==== GPUREG_VSH_CODE_CONFIG ====
==== GPUREG_VSH_CODE_CONFIG ====