Line 11: |
Line 11: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A9 | | | A9 |
− | | [[CONFIG Registers]] | + | | [[CONFIG9 Registers]] |
| | 0x10000000 | | | 0x10000000 |
| | Boot9, Process9 | | | Boot9, Process9 |
Line 28: |
Line 28: |
| | 0x10002000 | | | 0x10002000 |
| | Boot9, Process9 | | | Boot9, Process9 |
− | | DMA Engine | + | | AHB DMA Engine |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 48: |
Line 48: |
| | [[EMMC Registers]] | | | [[EMMC Registers]] |
| | 0x10006000 / 0x10007000 | | | 0x10006000 / 0x10007000 |
− | | Boot9, Process9 | + | | Boot9, Process9, NewKernel9Loader |
− | | 0x10007000 is apparently not used on retail | + | | SD(IO) controller 1 and 3. 3 is normally mapped to ARM11. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 62: |
Line 62: |
| | [[AES Registers]] | | | [[AES Registers]] |
| | 0x10009000 | | | 0x10009000 |
− | | Boot9, Process9 | + | | Boot9, Process9, NewKernel9Loader |
| | | | | |
| |- | | |- |
Line 69: |
Line 69: |
| | [[SHA Registers]] | | | [[SHA Registers]] |
| | 0x1000A000 | | | 0x1000A000 |
− | | Boot9, Process9 | + | | Boot9, Process9, NewKernel9Loader |
| | | | | |
| |- | | |- |
Line 81: |
Line 81: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A9 | | | A9 |
− | | [[XDMA Registers]] | + | | [[Corelink DMA Engines|XDMA Registers]] |
| | 0x1000C000 | | | 0x1000C000 |
| | Boot9, Kernel9 | | | Boot9, Kernel9 |
− | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330] | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (AXI busmaster, two channels, uses 32-bit bus width instead of 64). |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 94: |
Line 94: |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | |? | + | | A9 |
| | [[CONFIG Registers]] | | | [[CONFIG Registers]] |
| | 0x10010000 | | | 0x10010000 |
Line 101: |
Line 101: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | |? | + | | A9 |
− | | [[CONFIG Registers]] | + | | PRNG Registers |
| | 0x10011000 | | | 0x10011000 |
− | | Process9 | + | | Boot9, Process9 |
− | | | + | | Used as entropy-source for seeding random number generators. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | |? | + | | A9 |
− | |? | + | | [[OTP Registers]] |
| | 0x10012000 | | | 0x10012000 |
− | | Kernel9, NewKernel9Loader | + | | Boot9, Kernel9, NewKernel9Loader |
| | Top secret. | | | Top secret. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | |? | + | | A9 |
− | |? | + | | [[ARM7|ARM7 Registers]] |
| | 0x10018000 | | | 0x10018000 |
| | TwlProcess9 | | | TwlProcess9 |
Line 122: |
Line 122: |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | |? | + | | A11/A9 |
− | |? | + | | TMIO SD(IO) controller 3 |
| | 0x10100000 | | | 0x10100000 |
− | |? | + | | |
− | |? | + | | NWM references this controller but doesn't have access to it. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 133: |
Line 133: |
| | 0x10101000 | | | 0x10101000 |
| | [[Filesystem services]] | | | [[Filesystem services]] |
− | | | + | | These registers function the same as the [[SHA Registers]], with the exception of the FIFO being located at 0x10301000. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[Camera Registers]] | + | | [[Y2R Registers]] |
| | 0x10102000 | | | 0x10102000 |
| | [[Camera Services]] | | | [[Camera Services]] |
Line 144: |
Line 144: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[CSND Registers]] / DSP | + | | [[CSND Registers]] |
| | 0x10103000 | | | 0x10103000 |
| | TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]] | | | TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]] |
− | | Sound Hardware | + | | Sound hardware. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | |? | + | | [[MTX_Registers|LgyFb bottom screen]] |
| | 0x10110000 | | | 0x10110000 |
− | |? | + | | TwlBg |
− | |? | + | | IO registers used to access legacy output framebuffer, as well as configure the upscaling filter. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | |? | + | | [[MTX_Registers|LgyFb top screen]] |
| | 0x10111000 | | | 0x10111000 |
| | TwlBg | | | TwlBg |
− | | | + | | IO registers used to access legacy output framebuffer, as well as configure the upscaling filter. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 179: |
Line 179: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | |? | + | | [[WIFI Registers]] |
| | 0x10122000 | | | 0x10122000 |
| | [[NWM Services]] | | | [[NWM Services]] |
− | | WIFI? | + | | WIFI SDIO bus registers |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | |? | + | | ? |
| | 0x10123000 | | | 0x10123000 |
| | [[NWM Services]] | | | [[NWM Services]] |
Line 214: |
Line 214: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | |? | + | | [[CONFIG11 Registers]] |
| | 0x10140000 | | | 0x10140000 |
| | Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]] | | | Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]] |
− | | Power management | + | | System configuration. |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[PDN Registers]] / [[CODEC Registers]] | + | | [[PDN Registers]] |
| | 0x10141000 | | | 0x10141000 |
| | Process9, Boot11, Kernel11, TwlBg, [[Codec Services]], [[NWM Services]], [[SPI Services]], [[PDN Services]] | | | Process9, Boot11, Kernel11, TwlBg, [[Codec Services]], [[NWM Services]], [[SPI Services]], [[PDN Services]] |
Line 237: |
Line 237: |
| | [[SPI Registers]] | | | [[SPI Registers]] |
| | 0x10143000 | | | 0x10143000 |
− | | TwlBg | + | | TwlBg, dmnt Module |
− | | Only used under TWL_FIRM? | + | | Debugger related? |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 245: |
Line 245: |
| | 0x10144000 | | | 0x10144000 |
| | Boot11, Kernel11, TwlBg, [[I2C Services]] | | | Boot11, Kernel11, TwlBg, [[I2C Services]] |
− | | | + | | 3DS I2C interface (MCU + Cameras + LCD) |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11/A9 | | | A11/A9 |
− | | [[CODEC Registers]] | + | | [[I2S Registers]] |
| | 0x10145000 | | | 0x10145000 |
− | | TwlBg, [[Codec Services]] | + | | TwlBg, AgbBg, [[Codec Services]] |
− | | | + | | Sound input/output lines |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 258: |
Line 258: |
| | [[HID Registers]] | | | [[HID Registers]] |
| | 0x10146000 | | | 0x10146000 |
− | | Boot11, Kernel11, TwlBg, [[HID Services]] | + | | Boot9, Boot11, Kernel11, TwlBg, [[HID Services]], dlp Services |
| | See [[PAD]]. | | | See [[PAD]]. |
| |- | | |- |
Line 265: |
Line 265: |
| | [[GPIO Registers]] | | | [[GPIO Registers]] |
| | 0x10147000 | | | 0x10147000 |
− | | Boot11, TwlBg, [[GPIO Services]] | + | | Boot11, TwlBg, [[GPIO Services]], [[DSP Services]](v0) |
| | | | | |
| |- | | |- |
Line 273: |
Line 273: |
| | 0x10148000 | | | 0x10148000 |
| | TwlBg, [[I2C Services]] | | | TwlBg, [[I2C Services]] |
− | | | + | | 3DS I2C interface (Gyro + IR) |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 287: |
Line 287: |
| | 0x10161000 | | | 0x10161000 |
| | Boot11, TwlBg, [[I2C Services]] | | | Boot11, TwlBg, [[I2C Services]] |
− | | | + | | TWL I2C interface (MCU + Cameras) |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
Line 380: |
Line 380: |
| | NTR WIFI WS1 Region | | | NTR WIFI WS1 Region |
| |-style="border-top: double" | | |-style="border-top: double" |
− | | style="background: orange" |? | + | | style="background: green" | Yes |
| | A11 | | | A11 |
− | | CDMA | + | | [[Corelink DMA Engines|CDMA]] |
| | 0x10200000 | | | 0x10200000 |
| | Boot11, Kernel11 | | | Boot11, Kernel11 |
− | | On old 3DS this is [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330]. On the New 3DS it is unknown what this is. | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (eight channels). Only used by bootrom on New3DS. |
| + | |- |
| + | | style="background: green" | Yes |
| + | | A11 |
| + | | FCRAM configuration |
| + | | 0x10201000 |
| + | | TwlBg, Kernel11 (dead code) |
| + | | |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
− | |? | + | | [[LCD Registers]] |
| | 0x10202000 | | | 0x10202000 |
| | TwlBg, Kernel11, [[GSP Services]] | | | TwlBg, Kernel11, [[GSP Services]] |
Line 396: |
Line 403: |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
− | | DSP | + | | [[DSP Registers]] |
| | 0x10203000 | | | 0x10203000 |
| | [[DSP Services]] | | | [[DSP Services]] |
| + | | see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help. |
| + | |-style="border-top: double" |
| + | | style="background: red" | No |
| + | | A11 |
| + | | ? |
| + | | 0x10204000 |
| + | | ? |
| | | | | |
| |- | | |- |
− | | style="background: orange" |? | + | | style="background: red" | No |
| | A11 | | | A11 |
− | | CDMA | + | | [[Corelink DMA Engines|CDMA]] |
| | 0x10206000 | | | 0x10206000 |
| | NewKernel11 | | | NewKernel11 |
− | | CDMA was moved here on New 3DS. [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330]. | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330 r1p2] (eight channels). This is the DMA engine actually being used by the New3DS ARM11 kernel. |
| |- | | |- |
− | | style="background: orange" |? | + | | style="background: red" | No |
| | A11 | | | A11 |
| | [[MVD Registers]] | | | [[MVD Registers]] |
Line 414: |
Line 428: |
| | [[MVD Services]] | | | [[MVD Services]] |
| | New 3DS only? | | | New 3DS only? |
− | |- | + | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
Line 420: |
Line 434: |
| | 0x1020F000 | | | 0x1020F000 |
| | TwlBg, [[GSP Services]] | | | TwlBg, [[GSP Services]] |
− | | AXI Bus Configuration? | + | | [https://developer.arm.com/documentation/ddi0422/d/programmers-model/register-summary CoreLink™ NIC-301 r1p2]. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
− | | MIRROR | + | | AHB (or AXI?) FIFOs region |
− | | 0x10300000-0x10400000 | + | | 0x10300000-0x10340000 |
| | | | | |
− | | Mirror of 0x10100000-0x10200000 (faster bus?), CDMA wants these addresses | + | | Pages present in this region correspond to the same respective devices in the 0x10100000-0x10140000 region but don't hold the same registers. They hold the FIFOs instead: the HASH FIFO register is located at 0x10301000. The LgyFb scaler data FIFO are located at 0x10310000 (top) and 0x10311000 (bot), etc. Needed for DMA. |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
| | A11 | | | A11 |
− | | [[GPU Registers]] | + | | [[GPU/External_Registers|GPU Registers]] |
| | 0x10400000 | | | 0x10400000 |
| | Boot11, Kernel11, [[GSP Services]] | | | Boot11, Kernel11, [[GSP Services]] |
− | | | + | || |
− | |-
| |
− | | style="background: green" | Yes
| |
− | | A11
| |
− | | [[LCD Registers]]
| |
− | | 0x10420000
| |
− | | [[GSP Services]]
| |
− | | | |
| |} | | |} |
| | | |
− | IO registers starting at physical address 0x10200000 are not accessible from the ARM9 (which includes all LCD/GPU registers). | + | IO registers starting at physical address 0x10200000 are not accessible from the ARM9 (which includes all LCD/GPU registers). It seems IO registers below physical address 0x10100000 are not accessible from the ARM11 bus. |
| | | |
| ARM11 kernel virtual address mappings for these registers varies for different builds. For ARM11 user mode applications you have: | | ARM11 kernel virtual address mappings for these registers varies for different builds. For ARM11 user mode applications you have: |
| physaddr = virtaddr - 0x1EC00000 + 0x10100000 | | physaddr = virtaddr - 0x1EC00000 + 0x10100000 |
− |
| |
− | =0x10012000=
| |
− | Keys seem to be stored here? Access to this region is disabled once the ARM9 writes 0x2 to [[CONFIG|REG_SYSPROT9]]. Before writing that bit, the ARM9 copies the low u32 for the TWL keydata to +0x100 (and high u32 keydata to +0x104 with the New 3DS). On development units ([[CONFIG|UNITINFO]]!=0) ARM9 uses the first 8-bytes from 0x10012000 for the TWL keydata.
| |
− |
| |
− | Originally the above TWL keyinit + region disable was done by Kernel9. However, with the [[New_3DS]] FIRM ARM9 binary this is now done in the [[FIRM]] ARM9 binary loader, which also uses the 0x10012000 region for key generation.
| |