Line 32:
Line 32:
| ?
| ?
|
|
+
|-
+
| 0x1EF00034
+
| 0x10400034
+
| 4
+
| GPU Busy
+
| Bit31 is set when GPU is busy executing commands.
|-
|-
| 0x1EF00400
| 0x1EF00400
Line 49:
Line 55:
| ?
| ?
| [[#Transfer_Engine|Transfer Engine]]
| [[#Transfer_Engine|Transfer Engine]]
+
|
+
|-
+
| 0x1EF018E0
+
| 0x104018E0
+
| 0x14
+
| [[#Command_List|Command List]]
+
|
|}
|}
Line 282:
Line 295:
|}
|}
−
== 0x1EF018E0 ==
+
== Command List ==
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Register address
! Register address
Line 288:
Line 301:
|-
|-
| 0x1EF018E0
| 0x1EF018E0
−
| Buffer Size>>3
+
| Buffer size >> 3
|-
|-
| 0x1EF018E8
| 0x1EF018E8
−
| Buffer physical address>>3
+
| Buffer physical address >> 3
|-
|-
| 0x1EF018F0
| 0x1EF018F0
−
| Writing value 1 here triggers GPU processing for the specified buffer
+
| Writing value 1 here triggers GPU to execute the commands.
|}
|}