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GPU/External Registers (edit)

Revision as of 17:22, 10 October 2014

3,476 bytes added ,  17:22, 10 October 2014
Move LCD registers to this page since they belong to the same address range
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This page describes the address range used to configure the basic GPU functionality. Note that 3D rendering setup is not done via MMIO but instead by loading [[GPU Commands|GPU command lists]] by writing to [[#0x1EF018F0]].
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== Map ==
 
== Map ==
−
* 0x1EF00400 is the top [[LCD|screen]]
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* 0x1EF00400 is the top screen
−
* 0x1EF00500 is the bottom [[LCD|screen]]
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* 0x1EF00500 is the bottom screen
    
== Init Values from nngxInitialize for Top Screen ==
 
== Init Values from nngxInitialize for Top Screen ==
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* 0x1EF00478 = 1, doesn't stay 1, read as 0
 
* 0x1EF00478 = 1, doesn't stay 1, read as 0
 
* 0x1EF00474 = 0x10501
 
* 0x1EF00474 = 0x10501
−
  −
== 0x1EF018E0 ==
  −
{| class="wikitable" border="1"
  −
!  Register address
  −
!  Description
  −
|-
  −
| 0x1EF018E0
  −
| Buffer Size>>3
  −
|-
  −
| 0x1EF018E8
  −
| Buffer physical address>>3
  −
|-
  −
| 0x1EF018F0
  −
| Writing value 1 here triggers GPU processing for the specified buffer
  −
|}
  −
  −
These 3 registers are used by [[GSP_Shared_Memory|GX command]] 1. This is used for [[GPU_Commands|GPU commands]].
      
== 0x1EF00010 ==
 
== 0x1EF00010 ==
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These registers are used by [[GSP_Shared_Memory|GX command]] 2. 0x1EF00010 is used for the GX command buf0 parameters, while 0x1EF00020 is used for the GX command buf1 parameters.
 
These registers are used by [[GSP_Shared_Memory|GX command]] 2. 0x1EF00010 is used for the GX command buf0 parameters, while 0x1EF00020 is used for the GX command buf1 parameters.
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== 0x1EF00X5C ==
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{| class="wikitable" border="1"
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!  Bit
 +
!  Description
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|-
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| 15-0
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| Framebuffer width
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|-
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| 31-16
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| Framebuffer height
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|}
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 +
This controls the displayed LCD framebuffer dimensions.
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== 0x1EF00X70 ==
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{| class="wikitable" border="1"
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!  Bit
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!  Description
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|-
 +
| 15-0
 +
| Framebuffer format
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|-
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| 31-16
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| ?
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|}
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 +
=== Framebuffer format ===
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{| class="wikitable" border="1"
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|-
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!  Bit
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!  Description
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|-
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| 2-0
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| Color format
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|-
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| 3
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| ?
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|-
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| 4
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| Unused?
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|-
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| 5
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| Set when the main screen 3D right framebuffer address is set.
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|-
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| 6
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| 1 = main screen, 0 = sub screen. However if bit5 is set, this bit is cleared.
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|-
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| 7
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| ?
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|-
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| 9-8
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| Value 1 = unknown: get rid of rainbow strip on top of screen, 3 = unknown: black screen.
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|-
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| 15-10
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| Unused?
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|}
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 +
GSP module only allows the LCD stereoscopy to be enabled when bit5=1 and bit6=0 here. When GSP module updates this register, GSP module will automatically disable the stereoscopy if those bits are not set for enabling stereoscopy.
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=== Framebuffer color formats ===
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{| class="wikitable" border="1"
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|-
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!  Value
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!  Description
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!  Actual color components ordering
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|-
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| 0
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| GL_RGBA8_OES
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|
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|-
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| 1
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| GL_RGB8_OES
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| BGR
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|-
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| 2
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| GL_RGB565_OES
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| RGB
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|-
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| 3
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| GL_RGB5_A1_OES
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|
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|-
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| 4
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| GL_RGBA4_OES
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|
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|}
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== 0x1EF00X78 ==
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{| class="wikitable" border="1"
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!  Bit
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!  Description
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|-
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| 0
 +
| LCD framebuffer to display (0=first, 1=second)
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|-
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| 7-1
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| ?
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|-
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| 31-8
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| Unused
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|}
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 +
== 0x1EF00X90 ==
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{| class="wikitable" border="1"
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!  Bit
 +
!  Description
 +
|-
 +
| 31-0
 +
| Framebuffer width * pixel byte-size.
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|}
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 +
== Framebuffers ==
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{| class="wikitable" border="1"
 +
!  Process Virtual Address
 +
!  Kernel Virtual Address
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!  Physical Address
 +
!  Description
 +
|-
 +
| 0x1EF00468
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| 0xFFFCE468
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| 0x10400468
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| Main LCD, first framebuffer for 3D left
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|-
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| 0x1EF0046C
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| 0xFFFCE46C
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| 0x1040046C
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| Main LCD, second framebuffer for 3D left
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|-
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| 0x1EF00494
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| 0xFFFCE494
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| 0x10400494
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| Main LCD, first framebuffer for 3D right
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|-
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| 0x1EF00498
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| 0xFFFCE498
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| 0x10400498
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| Main LCD, second framebuffer for 3D right
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|-
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| 0x1EF00568
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| 0xFFFCE568
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| 0x10400568
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| Sub LCD, first framebuffer
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|-
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| 0x1EF0056C
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| 0xFFFCE56C
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| 0x1040056C
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| Sub LCD, second framebuffer
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|-
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| 0x1EF00594
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| 0xFFFCE594
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| 0x10400594
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| Sub LCD, unused first framebuffer
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|-
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| 0x1EF00598
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| 0xFFFCE598
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| 0x10400598
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| Sub LCD, unused second framebuffer
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|}
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 +
The above framebuffer registers contains the physical address for each framebuffer, normally located in FCRAM in the application's GSP heap. When other processes use GSP as well, the framebuffers for the process is stored in VRAM instead.
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These LCD framebuffers normally contain the last rendered frames from the GPU. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)
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Both of the 3D screen left/right framebuffers are displayed regardless of the 3D slider's state, however when the 3D slider is set to "off" the 3D effect is disabled. Normally when the 3D slider's state is set to "off" the left/right framebuffer addresses are set to the same physical address. When the 3D effect is disabled and the left/right framebuffers are set to separate addresses, the LCD seems to alternate between displaying the left/right framebuffer each frame.
    
== 0x1EF00C00 ==
 
== 0x1EF00C00 ==
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| Unused
 
| Unused
 
|}
 
|}
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 +
== 0x1EF018E0 ==
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{| class="wikitable" border="1"
 +
!  Register address
 +
!  Description
 +
|-
 +
| 0x1EF018E0
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| Buffer Size>>3
 +
|-
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| 0x1EF018E8
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| Buffer physical address>>3
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|-
 +
| 0x1EF018F0
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| Writing value 1 here triggers GPU processing for the specified buffer
 +
|}
 +
 +
These 3 registers are used by [[GSP_Shared_Memory|GX command]] 1. This is used for [[GPU_Commands|GPU commands]].
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