Changes

Jump to navigation Jump to search
150 bytes added ,  06:55, 9 October 2014
Line 790: Line 790:  
  Handle* thread=R1
 
  Handle* thread=R1
   −
This processorid is a bitmask for which processors the thread can be run on. Bit value zero enables thread execution for this CPUID, bit value one disables thread execution for this CPUID. Bit0-bit1 are for CPUID0-CPUID1. The s32 processorid must be <=2. The thread priority value must be in the following range: 0x0..0x3F.
+
This processorid is a bitmask for which processors the thread can be run on. Bit value zero enables thread execution for this CPUID, bit value one disables thread execution for this CPUID. Bit0-<...> are for CPUID0-CPUID<...>. The thread priority value must be in the following range: 0x0..0x3F.
 +
 
 +
With the Old3DS kernel, the s32 processorid must be <=2. With the New3DS kernel, processorid must be <= <total cores(MPCore "SCU Configuration Register" CPU number value + 1)>.
    
The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address.
 
The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address.

Navigation menu