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Line 1: − {{stub}}+ − This page lists and describes the hardware found inside the Nintendo 3DS. Many of these parts are custom made and are expanded upon here or in other pages.+ + + + + + + + + + + + + + + + + + + + + + + + + − − + − + − + + + + + − + − + − + − + − + − + − + − + − + − + − + − + − + + Line 50:
Line 78: − == [[New_3DS]] Specifications ==+ − {| class="wikitable" − ! Type !! Description !! Datasheet !! Source − |- − | ARM11 Processor Core || ARM11 MPCore 4x 268MHz(?) & 4x VFP Co-Processor || [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/index.html] || − |- − | FCRAM || 256MB || || − |- − | VRAM || 6 MB within SoC. Independent of system memory (FCRAM). || N/A || − |- − | || 4MB of additional memory. || N/A || − |} Line 79:
Line 96: − As mentioned, DMP's (Digital Media Proffesionals) PICA 200, 268Mhz. This GPU supports OpenGL ES 1.1.+ + + − Block diagram of an ULTRAY2000 based architecture PICA200+ + + + + + + + + + + + + + + + + + Line 111:
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Line 169: − + − I2C eeprom is colored blue:+ Line 136:
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→SDIO controller
This page lists and describes the hardware found inside the Nintendo 3DS. Many of these parts are custom made and are expanded upon here or in other pages.
== Common hardware ==
{| class="wikitable"
! Type !! Description
|-
| ARM11 Processor Core || Old3DS: [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/index.html ARM11 2x MPCore & 2x VFPv2 Co-Processor] 268MHz (268,111,856.0 ± 2<sup>-32</sup> Hz, i.e. exactly twice the clock rate of the ARM9).
New3DS: 4x MPCore, 4x VFPv2, able to run up to 804MHz (see below). It also has an optional 2MB L2 cache.
|-
| ARM9 Processor Core || [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html ARM946] 134MHz (134,055,927.9 ± 2<sup>-32</sup> Hz),
|-
| GPU || [http://en.wikipedia.org/wiki/PICA200 DMP PICA] 268MHz,
|-
| VRAM || 6 MB within SoC.
|-
| Top screen || 800x240, with only 400 usable pixels per eye per line.
|-
| Bottom screen || 320x240, with resistive touch overlay.
|-
| DSP || [https://twitter.com/CEVADSP/status/177172880918986752 CEVA TeakLite]. 134Mhz. 24ch 32728Hz sampling rates.
|}
New3DS exclusives are able to clock the CPU at 804MHz, but this appears to be limited to the currently running application/app cores. Timed by running svcGetSystemTick on either side of a long idle loop to stay in the current process context. svcGetSystemTick uses a tick counter running at 268MHz in this mode.
On New3DS: when Home Menu is active, the system runs at 804MHz. For everything else, it's 268MHz, except when the app(let) has the required flag set. See [[NCCH/Extended_Header|here]] and [[PDN_Registers|here]] for details, regarding clock-rate and cache.
For New3DS-only there are multiple clock-rate multiplier values available in [[PDN_Registers|hardware]], but since the relevant code is only implemented in the New3DS ARM11-kernel, the only non-normal clock-rate available with official kernel code is 3x.
== Specifications ==
== Specifications ==
{| class="wikitable"
{| class="wikitable"
! Type !! Name !! Datasheet !! Source
! Type !! 3DS !! 3DSXL !! 2DS !! N3DS !! N3DSXL !! N2DSXL
|-
|-
| SoC || Nintendo 1048 0H (Custom): CPU, GPU, VRAM & DSP all on one chip. || N/A || N/A
| Model || CTR-001 || SPR-001 || FTR-001 || KTR-001 || RED-001 || JAN-001
|-
|-
| ARM11 Processor Core || ARM11 MPCore 2x 268MHz(~268123480 Hz) & 2x VFP Co-Processor || [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/index.html] || [11]
| SoC || CPU CTR
|| CPU CTR A
CPU CTR
|| CPU CTR B || CPU LGR A || CPU LGR A || CPU LGR A
|-
|-
| ARM9 Processor Core || ARM946 134MHz(~134058675 Hz) || [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0201d/index.html] ||
| FCRAM || [https://web.archive.org/web/20221022124807/https://www.fujitsu.com/downloads/MICRO/fma/pdf/MB81EDS516545_e511463.pdf 2x64MB Fujitsu MB82M8080-07L] || Fujitsu MB82DBS16641 || Fujitsu MB82DBS1664 || ?? || Fujitsu MB82MK9A9A || Fujitsu MB82MK9A9A
|-
|-
| GPU || [http://en.wikipedia.org/wiki/PICA200 DMP PICA] 268MHz || N/A || [11]
| Top Screen || 3.53 in, 3D || 4.88 in, 3D || 3.53 in cropped from a single panel || 3.88 in, 3D || 4.88 in, 3D || 4.88 in (?)
|-
|-
| DSP || CEVA TeakLite. Based on Atmel AT75C. 134Mhz. 24ch 32728Hz sampling rates. || N/A || [11] [https://twitter.com/CEVADSP/status/177172880918986752]
| Bottom Screen || 3.00 in || 4.18 in || 3.00 in cropped from a single panel || 3.33 in || 4.18 in || 4.18 in (?)
|-
|-
| VRAM || 6 MB within SoC. Independent of system memory (FCRAM). || N/A || [11]
| Storage ||colspan="2"| Toshiba THGBM2G3P1FBAI8 1GB ||colspan="1"| Changed between O3DS and N3DS parts depending on production date ||colspan="2"| Samsung KLM4G1YEQC 4GB (in 1.3GiB SLC mode) or Toshiba THGBMBG4P1KBAIT 2GB (MLC, approx. 1.8GiB usable) ||colspan="1"| Samsung KLM4G1FEPD 4GB
|-
|-
| FCRAM || 2x64MB Fujitsu MB82M8080-07L ||[http://crediar.no-ip.com/sg_/download.php?id=d67d1c][http://edevice.fujitsu.com/fj/DATASHEET/e-ds/e511463.pdf][http://edevice.fujitsu.com/jp/datasheet/j-ds/j511463.pdf]|| [5]
| Speaker, Microphone, Circlepad, Touch controller || TI PAIC3010B 0AA37DW || ?? || ?? || TI AIC3010B 39C4ETW || TI AIC3010D 48C01JW || ??
|-
|-
| Storage || Toshiba THGBM2G3P1FBAI8 1GB NAND Flash || N/A || N/A
| Gyroscope || [https://www.sparkfun.com/datasheets/Sensors/Gyro/PS-ITG-3200-00-01.4.pdf Invensense ITG-3270 MEMS Gyroscope] || ?? || ?? || ?? || ?? || ??
|-
|-
| Power Management || Texas Instruments PAIC3010B 0AA37DW || N/A || FCC filing
| Accelerometer || ST Micro 2048 33DH X1MAQ Accelerometer Model LIS331DH || ?? || ?? || ?? || ?? || ??
|-
|-
| Gyroscope || Invensense ITG-3270 MEMS Gyroscope || [http://dl-web.dropbox.com/u/20520664/references/PS-ITG-3200-00-01.4.pdf] || N/A
| Infrared IC || NXP S750 0803 TSD031C || ?? || ?? || ?? || NXP S750 1603 TSD438C || NXP S750 0210 TSD651C
|-
|-
| Accelerometer || ST Micro 2048 33DH X1MAQ Accelerometer Model LIS331DH || [http://dl.dropbox.com/u/20520664/references/CD00213470.pdf] || N/A
| Custom Microcontroller || Renesas UC CTR || ?? || Renesas UC CTR 324KM47 KG10 || Renesas UC KTR || Renesas UC KTR 442KM13 TK14 || ??
|-
|-
| Wifi || 802.11b/g Atheros AR6014 || [http://www.db.pokestation.net/3DS/Wi-Fi%20module%20pinouts.pdf] || N/A
| PMIC? || TI 93045A4 OAAH86W || ?? || ?? || TI 93045A4 38A6TYW G2 || TI 93045A4 49AF3NW G2 || TI 93045A4 72ASRHW G2
|-
|-
| Infrared IC || NXP infrared IC, "S750 0803 TSD031C" || [12] || [10]
| Charging IC ||colspan="6"| CKP TI [http://www.ti.com/lit/ds/symlink/bq24072.pdf BQ24072]
|-
|-
| Auxiliary Microcontroller || Renesas Electronics UC CTR, custom Nintendo microcontroller || N/A || N/A
| Wifi || Atheros AR6014 || ?? || ?? || ?? || Atheros AR6014G-AL1C || ??
|-
|-
| ? || "TI 93045A4 OAAH86W" || N/A || N/A
| Wifi SPI Flash
| Raw ID data: 20 58 || ?? || ?? || Raw ID data: 62 62 || ?? || ??
|}
|}
* [12] This IC is somewhat similar to [http://www.alldatasheet.net/datasheet-pdf/pdf/347838/NXP/SC16IS750IBS.html this].
* [12] This IC is somewhat similar to [http://www.alldatasheet.net/datasheet-pdf/pdf/347838/NXP/SC16IS750IBS.html this].
* The Raw ID data for Wifi SPI Flash is from command 0x9F, RDID.
== FCRAM ==
== FCRAM ==
== GPU ==
== GPU ==
Designed by Digital Media Professionals Inc. (DMP) and codenamed PICA200, 268Mhz.
Block diagram of an ULTRAY2000 based architecture PICA200:
[[File:Pica200BlockDiagram.png]]
[[File:Pica200BlockDiagram.png]]
PICA200 is compatible with OpenGL ES 1.1. It furthermore provides unique functionality for:
* Per-fragment lighting ("Lighting Maestro")
* Hard- and soft-shadowing ("Shadow Maestro")
* Polygon subdivision ("Figure Maestro")
* Bump mapping and procedural textures ("Mapping Maestro")
* Rendering of gaseous objects ("Particle Maestro")
Some parts of the extended functionality are provided in hardware by an extended geometry pipeline. Most importantly, PICA200 has three programmable vertex processors. There is furthermore a unit called [[GPU/Primitive_Engine|Primitive Engine]], which is a geometry shader unit (using the same instruction set as vertex shaders) with support for variable-size primitives. The Primitive Engine functionality may be disabled, and the geometry shader unit then acts as a fourth vertex processor. See [[Shader_Instruction_Set]] for more information on the shader instruction set.
[[GPU/Fragment Lighting|Fragment lighting]] is implemented as an optional pipeline step during pixel processing. It's implemented by having the vertex shader output an additional attribute describing the transformation (represented by a quaternion) to surface-local space. This per-vertex quaternion can then be interpolated across screen space to calculate dot products relevant for lighting (e.g. light vector dot normal vector). To provide support for advanced lighting models, these dot products are used as indices into programmable lookup tables. With this setup, PICA200 in particular supports the shading models Blinn-Phong, Cook-Terrance, Ward, and microfacet-based BRDF-models.
PICA200 supports four texture units, the fourth of which is used exclusively for [[GPU/Procedural Texture Generation|procedural texture generation]].
== SDIO controller ==
Nintendo recommends SD cards up to 32 GB. The internal SDIO controller seems to support SD cards up to 2.199 Terabyte (32-bit sector number). It's unknown if 2TB works. Up to 1TB has been tested and works, however larger SD sizes increase system boot time. The larger the SD capacity, the greater the bootup slowdown. 64-128GB tends to be the sweet spot for most users, with only an extra 0.5-1.0 seconds added to boot time as the tradeoff for the larger size.
SD cards should be formatted FAT32 with a 64KB unit size for maximum compatibility.
== Images ==
== Images ==
[[Image:CTR_NAND_pinout_XL.jpg|500px]]
[[Image:CTR_NAND_pinout_XL.jpg|500px]]
==== 2DS ====
[[Image:2DSeMMC.jpg|500px]]
==== New 3DS ====
[[Image:N3DSeMMC.jpg]]
==== New 3DS XL ====
[[Image:N3DSXLeMMC.jpg]]
=== WiFi dongle pinout ===
=== WiFi dongle pinout ===
This is the interface for the 'NEW' WiFi module (based on Atheros AR6002) first included in DSi.
This is the interface for the 'NEW' WiFi module (based on Atheros AR6002) first included in DSi.
The proprietary and by now ancient DS-mode WiFi is colored yellow, pins are unknown.
The proprietary DS-mode WiFi is colored yellow, pins are unknown.
I²C eeprom is colored blue:
* SCL
* SCL
* SDA
* SDA
* NC
* NC
=== Auxiliary Microntroller ===
=== Auxiliary Microcontroller (MCU) ===
[[Image:CTR_UC.png|600px]]
[[Image:CTR_UC.png|600px]]
Monitors HOME button, WiFi switch, 3D slider, volume control slider.
Monitors HOME button, WiFi switch, 3D slider, volume control slider.
Controls LEDs, various power supplies.
Controls LEDs, various power supplies via an I²C connection to the PMIC.
Devices attached to I2C bus:
Two I²C buses are attached to the MCU. For one, the SoC is the master; for the other, the MCU is the master.
* UC (master?)
Devices attached to MCU master I²C bus:
* MCU (master)
* Fuel Gauge
* Accelerometer (slave address 0x18)
* Accelerometer (slave address 0x18)
* SoC (master? slave?)
* PMIC
* maybe more?
Devices attached to the SoC master I²C bus:
* SoC (master)
* MCU
* LCD
* Camera
* QTM (New3DS-only)
The MCU uses the [http://mcs.uwsuper.edu/sb/327/Resources/RL78.pdf RL78 ISA].
The MCU uses some custom Special Function Registers, but documentation for much of the hardware protocol/general SFRs can be found [http://courses.ee.sun.ac.za/Computer_Systems_245/Dokumentasie/RL78%20hardware%20manual%20(registers).pdf here].