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- 17:15, 1 March 2015 diff hist +358 SHBIN Describe uniform table register space
- 17:05, 1 March 2015 diff hist +453 SHBIN Cleanup and restructure and clarify
- 14:04, 27 February 2015 diff hist +62 GPU/External Registers Fix the example, lol.
- 13:56, 27 February 2015 diff hist +108 GPU/External Registers Explicit example.
- 13:54, 27 February 2015 diff hist +40 GPU/External Registers →Framebuffer color formats
- 13:52, 27 February 2015 diff hist +12 GPU/Commands →Command 0x0111
- 13:50, 27 February 2015 diff hist +243 GPU/Internal Registers Formats verified via hardware tests and/or Citra compatibility. Pixel Size kept around as before.
- 22:05, 24 February 2015 diff hist -53 GPU/External Registers Not sure what bit16 does, but it's not that. See bit1.
- 22:02, 24 February 2015 diff hist -5 GPU/External Registers Fixup bits 24 and 25
- 02:30, 24 February 2015 diff hist -28 m GPU/External Registers Remove information which serves no value for well-understood fields.
- 21:27, 4 February 2015 diff hist +114 AES Registers Add stuff by sbJFn5r's request
- 21:20, 4 February 2015 diff hist -51 AES Registers Fixed misinformation, as pointed out by yellows8
- 21:04, 4 February 2015 diff hist +552 AES Registers Clarified keyslots
- 22:28, 24 January 2015 diff hist -18 m EMMC Registers Update dead links
- 16:32, 24 January 2015 diff hist 0 m GPU/Shader Instruction Set
- 16:25, 24 January 2015 diff hist +332 GPU/Shader Instruction Set →Operand descriptors
- 16:20, 24 January 2015 diff hist -20 m GPU/Shader Instruction Set
- 16:20, 24 January 2015 diff hist -227 GPU/Shader Instruction Set Clean up and simplify
- 16:06, 24 January 2015 diff hist +88 GPU/Shader Instruction Set MOVA considers the dest mask
- 15:52, 24 January 2015 diff hist +78 GPU/Shader Instruction Set →Relative addressing