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64 bytes removed ,  13:12, 5 September 2023
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The Interrupt info structure is located at sharedmemvadr + process_gsp_index*0x40.
 
The Interrupt info structure is located at sharedmemvadr + process_gsp_index*0x40.
   −
It is a list of interrupts (id's 0-6 exist).
+
It's a list of interrupts.
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
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|-
 
|-
 
| 0x0
 
| 0x0
| Index of the last processed data (field size is 0x33) (must be updated manually)
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| Index of the last processed data (must be updated manually)
 
|-
 
|-
 
| 0x1
 
| 0x1
| To be processed datafields, (max 0x20 for PDC interrupts else the missed PDC filds are used,max 0x34 for all other if more interrupts happen and the Errorflag is 0 the Errorflag is set to 1)
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| Count (max 0x1F for PDC, 0x33 for others)
 
|-
 
|-
 
| 0x2
 
| 0x2
| Errorflag (if the first bit of Errorflag is set future PDC interrupts are ignored)
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| Missed other interrupts (set to 1 when 0 and count > 0x33)
 
|-
 
|-
 
| 0x3
 
| 0x3
| not used
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| Flags (bit0 = skip PDC)
 
|-
 
|-
 
| 0x4-0x7
 
| 0x4-0x7
| missed PDC0
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| Missed PDC0 (incremented when flags.bit0 is clear and count > 0x1F)
 
|-
 
|-
 
| 0x8-0xB
 
| 0x8-0xB
| missed PDC1
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| Missed PDC1 (same as above)
 
|-
 
|-
 
| 0xC-0x3F
 
| 0xC-0x3F
| u8 Interrupttypefield (0=PSC0, 1=PSC1, 2=PDC0/VBlankTop (sent to all threads), 3=PDC1/VBlankBottom (sent to all threads), 4=PPF, 5=P3D, 6=DMA)
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| Interrupt list (u8) (0=PSC0, 1=PSC1, 2=PDC0/VBlankTop, 3=PDC1/VBlankBottom, 4=PPF, 5=P3D, 6=DMA)
 
|}
 
|}
 +
 +
PDC interrupts are sent to all processes; other interrupts are only sent to the process with GPU rights.
    
=Framebuffer info=
 
=Framebuffer info=
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