525
edits
Changes
→Hardware Interrupts
| 0x58
| 0x58
| Kernel
| Kernel
| PDN Wake Event
| PDN (wake event or SoC mode changed)
|-
|-
| 0x59
| 0x59
| 0x66
| 0x66
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA1.bit1 (sfio = ?)
| GPIO2_1
|-
|-
| 0x68
| 0x68
| 0x6B
| 0x6B
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA3.bit3 (sfio = ?)
| GPIO3_3
|-
|-
| 0x6C
| 0x6C
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA3.bit4 (sfio = ?)
| GPIO3_4
|-
|-
| 0x6D
| 0x6D
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA3.bit5 (sfio = ?)
| GPIO3_5
|-
|-
| 0x6E
| 0x6E
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA3.bit6 (sfio = ?)
| GPIO3_6
|-
|-
| 0x6F
| 0x6F
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA3.bit7 (sfio = ?)
| GPIO3_7
|-
|-
| 0x70
| 0x70
| gpio, TwlBg
| gpio, TwlBg
| GPIO_DATA3.bit8 (sfio = ?)
| GPIO3_8
|-
|-
| 0x71
| 0x71
| 0x73
| 0x73
| TwlBg
| TwlBg
| GPIO_DATA3.bit11 (sfio = ?)
| GPIO3_11
|-
|-
| 0x74
| 0x74
There are 2 tables in the ARM11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core. The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8). The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).
There are 2 tables in the Arm11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core. The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8). The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).
The Arm11 kernel configures interrupts the following way:
The Arm11 kernel configures interrupts the following way (it seems the GPIO IRQ layout doesn't match released 3DS models):
<nowiki>Interrupts 0x00 to 0x1F: edge-triggered, N-N
<nowiki>Interrupts 0x00 to 0x1F: edge-triggered, N-N