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| 0x8000 = enabled?, 0x4000 = latch, other bits are to-be-latched bits in order of the regs below, starting from bit 0. TIME1 and TIME2 are one bit (0x10) together
+
| Control register
|-
|-
| RTC_REG_STAT1
| RTC_REG_STAT1
Line 229:
Line 229:
| 1-15
| 1-15
| Unused by GPIO-sysmodule and TwlBg.
| Unused by GPIO-sysmodule and TwlBg.
+
|}
+
+
== Legacy RTC ==
+
=== RTC_CNT (0x10147100) ===
+
{| class="wikitable" border="1"
+
! Bit
+
! Description
+
|-
+
| 0
+
| Latch STAT1
+
|-
+
| 1
+
| Latch STAT2
+
|-
+
| 2
+
| Latch CLKADJ
+
|-
+
| 3
+
| Latch FREE
+
|-
+
| 4
+
| Latch TIME
+
|-
+
| 5
+
| Latch ALRMTIM1
+
|-
+
| 6
+
| Latch ALRMTIM2
+
|-
+
| 7
+
| Latch COUNT
+
|-
+
| 8
+
| Latch FOUT1
+
|-
+
| 9
+
| Latch FOUT2
+
|-
+
| 10
+
| Latch ALRMDAT1
+
|-
+
| 11
+
| Latch ALRMDAT2
+
|-
+
| 12
+
| ARM7 Busy? This may be chipselect
+
|-
+
| 13
+
| ARM7 read command received? (writing 1 clears it seems)
+
|-
+
| 14
+
| ARM7 write command recieved? (writing 1 clears it seems)