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GPIO Registers (edit)

Revision as of 12:08, 21 September 2019

93 bytes added ,  12:08, 21 September 2019
→‎Legacy RTC
Line 71: Line 71:  
| 1
 
| 1
 
| Rtc status register 2 (command 1). Bitswapped
 
| Rtc status register 2 (command 1). Bitswapped
 +
|-
 +
| RTC_REG_CLKADJ
 +
| 0x10147112
 +
| 1
 +
| Rtc clock adjustment register (command 6). Bitswapped
 
|-
 
|-
 
| RTC_REG_FREE
 
| RTC_REG_FREE
Gericom
21

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