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SPI Registers (edit)

Revision as of 21:41, 11 May 2019

1,292 bytes added ,  21:41, 11 May 2019
→‎Registers
Line 8: Line 8:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#SPI_CNT|SPI_CNT]]0
+
| [[#SPI_CNT|SPI_CNT]]1
 
| 0x10142000
 
| 0x10142000
 
| 2
 
| 2
Line 14: Line 14:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| SPI_DATA0
+
| SPI_DATA1
 
| 0x10142002
 
| 0x10142002
 
| 1  
 
| 1  
Line 20: Line 20:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_CNT|NSPI_CNT]]0
+
| [[#NSPI_CNT|NSPI_CNT]]1
 
| 0x10142800
 
| 0x10142800
 
| 4
 
| 4
Line 26: Line 26:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_DONE|NSPI_DONE]]0
+
| [[#NSPI_DONE|NSPI_DONE]]1
 
| 0x10142804
 
| 0x10142804
 
| 4
 
| 4
Line 32: Line 32:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_BLKLEN|NSPI_BLKLEN]]0
+
| [[#NSPI_BLKLEN|NSPI_BLKLEN]]1
 
| 0x10142808
 
| 0x10142808
 
| 4
 
| 4
Line 38: Line 38:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_FIFO|NSPI_FIFO]]0
+
| [[#NSPI_FIFO|NSPI_FIFO]]1
 
| 0x1014280C
 
| 0x1014280C
 
| 4
 
| 4
Line 44: Line 44:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_STATUS|NSPI_STATUS]]0
+
| [[#NSPI_STATUS|NSPI_STATUS]]1
 
| 0x10142810
 
| 0x10142810
 
| 4
 
| 4
Line 50: Line 50:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Same as [[SPICARD_Registers|SPICARD]] + 0x814. Unused by SPI sysmodule.
+
| [[#NSPI_AUTOPOLL|NSPI_AUTOPOLL]]1
 
| 0x10142814
 
| 0x10142814
 
| 4
 
| 4
−
|
+
| -
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Unused by SPI sysmodule.
+
| [[#NSPI_INT_MASK|NSPI_INT_MASK]]1
 
| 0x10142818
 
| 0x10142818
 
| 4
 
| 4
−
|
+
| -
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Unused by SPI sysmodule.
+
| [[#NSPI_INT_STAT|NSPI_INT_STAT]]1
 
| 0x1014281C
 
| 0x1014281C
 
| 4
 
| 4
−
|
+
| -
 +
|-
 
|-style="border-top: double"
 
|-style="border-top: double"
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#SPI_CNT|SPI_CNT]]1
+
| [[#SPI_CNT|SPI_CNT]]2
 
| 0x10143000
 
| 0x10143000
 
| 2
 
| 2
Line 74: Line 75:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| SPI_DATA1
+
| SPI_DATA2
 
| 0x10143002
 
| 0x10143002
 
| 1  
 
| 1  
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_CNT|NSPI_CNT]]1
+
| [[#NSPI_CNT|NSPI_CNT]]2
 
| 0x10143800
 
| 0x10143800
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_DONE|NSPI_DONE]]1
+
| [[#NSPI_DONE|NSPI_DONE]]2
 
| 0x10143804
 
| 0x10143804
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_BLKLEN|NSPI_BLKLEN]]1
+
| [[#NSPI_BLKLEN|NSPI_BLKLEN]]2
 
| 0x10143808
 
| 0x10143808
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_FIFO|NSPI_FIFO]]1
+
| [[#NSPI_FIFO|NSPI_FIFO]]2
 
| 0x1014380C
 
| 0x1014380C
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_STATUS|NSPI_STATUS]]1
+
| [[#NSPI_STATUS|NSPI_STATUS]]2
 
| 0x10143810
 
| 0x10143810
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Same as [[SPICARD_Registers|SPICARD]] + 0x814. Unused by SPI sysmodule.
+
| [[#NSPI_AUTOPOLL|NSPI_AUTOPOLL]]2
 
| 0x10143814
 
| 0x10143814
 
| 4
 
| 4
−
|
+
| -
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Unused by SPI sysmodule.
+
| [[#NSPI_INT_MASK|NSPI_INT_MASK]]2
 
| 0x10143818
 
| 0x10143818
 
| 4
 
| 4
−
|
+
| -
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Unused by SPI sysmodule.
+
| [[#NSPI_INT_STAT|NSPI_INT_STAT]]2
 
| 0x1014381C
 
| 0x1014381C
 
| 4
 
| 4
−
|
+
| -
 
|-style="border-top: double"
 
|-style="border-top: double"
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#SPI_CNT|SPI_CNT]]2
+
| [[#SPI_CNT|SPI_CNT]]3
 
| 0x10160000
 
| 0x10160000
 
| 2
 
| 2
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| SPI_DATA2
+
| SPI_DATA3
 
| 0x10160002
 
| 0x10160002
 
| 1  
 
| 1  
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_CNT|NSPI_CNT]]2
+
| [[#NSPI_CNT|NSPI_CNT]]3
 
| 0x10160800
 
| 0x10160800
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_DONE|NSPI_DONE]]2
+
| [[#NSPI_DONE|NSPI_DONE]]3
 
| 0x10160804
 
| 0x10160804
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_BLKLEN|NSPI_BLKLEN]]2
+
| [[#NSPI_BLKLEN|NSPI_BLKLEN]]3
 
| 0x10160808
 
| 0x10160808
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_FIFO|NSPI_FIFO]]2
+
| [[#NSPI_FIFO|NSPI_FIFO]]3
 
| 0x1016080C
 
| 0x1016080C
 
| 4
 
| 4
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|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| [[#NSPI_STATUS|NSPI_STATUS]]2
+
| [[#NSPI_STATUS|NSPI_STATUS]]3
 
| 0x10160810
 
| 0x10160810
 
| 4
 
| 4
Line 170: Line 171:  
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Same as [[SPICARD_Registers|SPICARD]] + 0x814. Unused by SPI sysmodule.
+
| [[#NSPI_AUTOPOLL|NSPI_AUTOPOLL]]3
 
| 0x10160814
 
| 0x10160814
 
| 4
 
| 4
−
|
+
| -
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Unused by SPI sysmodule.
+
| [[#NSPI_INT_MASK|NSPI_INT_MASK]]3
 
| 0x10160818
 
| 0x10160818
 
| 4
 
| 4
−
|
+
| -
 
|-
 
|-
 
| style="background: green" | Yes
 
| style="background: green" | Yes
−
| ? Unused by SPI sysmodule.
+
| [[#NSPI_INT_STAT|NSPI_INT_STAT]]3
 
| 0x1016081C
 
| 0x1016081C
 
| 4
 
| 4
−
|
+
| -
 
|}
 
|}
   Line 235: Line 236:  
|-
 
|-
 
| 0-2
 
| 0-2
−
| Baudrate?
+
| Clock
 
|-
 
|-
 
| 6-7
 
| 6-7
−
| Device Select
+
| Device select
 
|-
 
|-
 
| 12
 
| 12
−
| Bus mode 0=1 bit, 1=4 bit
+
| Bus mode (0 = 1 bit, 1 = 4 bit)
 
|-
 
|-
 
| 13
 
| 13
−
| Transfer Direction? (0=Incoming, 1=Outgoing)
+
| Transfer direction (0 = read, 1 = write)
 
|-
 
|-
 
| 15
 
| 15
−
| Busy/enable
+
| 1 = Busy/enable
 
|}
 
|}
    
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
 
!  Device id
 
!  Device id
−
!  Device select bits
+
!  Bus
 +
!  Device select
 +
!  Clock
 
|-
 
|-
−
| 0, 3, >=6
   
| 0
 
| 0
 +
| 3
 +
| 0
 +
| 2
 +
|-
 +
| 1, 2
 +
| 3
 +
| 1, 2
 +
| ?, ?
 +
|-
 +
| 3
 +
| 1
 +
| 0
 +
| 5
 
|-
 
|-
−
| 1, 4
+
| 4, 5
 
| 1
 
| 1
 +
| 1, 2
 +
| ?, ?
 
|-
 
|-
−
| 2, 5
+
| 6
 
| 2
 
| 2
 +
| 0
 +
| ?
 
|}
 
|}
    +
== NSPI_DONE ==
 
{| class="wikitable" border="1"
 
{| class="wikitable" border="1"
−
!  Device id
+
!  BIT
−
!  Used baudrate
+
!  DESCRIPTION
 
|-
 
|-
−
| 3
+
| 0
−
| 5
+
| Chip select
 
|-
 
|-
−
| 0
+
| 1-31
−
| 2
+
| Unused
 
|}
 
|}
   −
== NSPI_DONE ==
+
Contains 1 when the SPI slave is selected. A 0 is written here on transfer end to deselect the slave.
−
This register reads as 1 after starting a transfer. When the transfer is finished, a 0 has to be written to this register. This is probably the Chip Select line.
+
 
 +
== NSPI_BLKLEN ==
 +
{| class="wikitable" border="1"
 +
!  BIT
 +
!  DESCRIPTION
 +
|-
 +
| 0-20
 +
| Transfer size
 +
|-
 +
| 21-31
 +
| Unused
 +
|}
   −
==NSPI_BLKLEN==
   
The number of bytes to be sent/read is written to this register.
 
The number of bytes to be sent/read is written to this register.
   −
==NSPI_FIFO==
+
== NSPI_FIFO ==
 +
{| class="wikitable" border="1"
 +
!  BIT
 +
!  DESCRIPTION
 +
|-
 +
| 0-31
 +
| Data
 +
|}
 +
 
 
32-bit FIFO for reading/writing the SPI payload.
 
32-bit FIFO for reading/writing the SPI payload.
   −
==NSPI_STATUS==
+
== NSPI_STATUS ==
−
Bit0: FIFO busy. At transfer start and every 32 bytes the FIFO becomes busy.
+
{| class="wikitable" border="1"
 +
!  BIT
 +
!  DESCRIPTION
 +
|-
 +
| 0
 +
| FIFO full (0 = not full, 1 = full)
 +
|-
 +
| 1-31
 +
| Unused
 +
|}
 +
 
 +
At transfer start and every 32 bytes the FIFO becomes busy.
 +
 
 +
== NSPI_AUTOPOLL ==
 +
{| class="wikitable" border="1"
 +
!  BIT
 +
!  DESCRIPTION
 +
|-
 +
| 0-7
 +
| Command
 +
|-
 +
| 16-19
 +
| Timeout (Tries = 31<<Baudrate (from NSPI_CNT) + Timeout)
 +
|-
 +
| 24-26
 +
| Bit offset (0-7)
 +
|-
 +
| 30
 +
| Poll for a set or unset bit
 +
|-
 +
| 31
 +
| 1 = Enable/Busy
 +
|}
 +
 
 +
This automatically sends a command to the device and compares the specified bit in the response with bit 30 until it matches or a timeout occurs.
 +
 
 +
== NSPI_INT_MASK ==
 +
{| class="wikitable" border="1"
 +
!  BIT
 +
!  DESCRIPTION
 +
|-
 +
| 0
 +
| Transfer finished? (1 = disabled)
 +
|-
 +
| 1
 +
| Autopoll success (1 = disabled)
 +
|-
 +
| 2
 +
| Autopoll timeout (1 = disabled)
 +
|}
 +
 
 +
== NSPI_INT_STAT ==
 +
{| class="wikitable" border="1"
 +
!  BIT
 +
!  DESCRIPTION
 +
|-
 +
| 0
 +
| Transfer finished?
 +
|-
 +
| 1
 +
| Autopoll success
 +
|-
 +
| 2
 +
| Autopoll timeout
 +
|}
 +
 
 +
[[ARM11_Interrupts#Hardware_Interrupts|Interrupt]] ID 0x56 or 0x57 (depending on the bus) is fired when any of the bits change to 1 except for interrupts masked in [[#NSPI_INT_MASK|NSPI_INT_MASK]]. Writing 1 to a bit in this register aknowledges the interrupt.
Profi200
137

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