Line 26: |
Line 26: |
| | Parameter mask | | | Parameter mask |
| |- | | |- |
− | | 20-30 | + | | 20-27 |
| | Number of extra parameters (may be zero) | | | Number of extra parameters (may be zero) |
| + | |- |
| + | | 28-30 |
| + | | Unused |
| |- | | |- |
| | 31 | | | 31 |
Line 4,158: |
Line 4,161: |
| | | |
| These registers map components of the corresponding vertex shader output register to specific fixed-function semantics. | | These registers map components of the corresponding vertex shader output register to specific fixed-function semantics. |
| + | |
| + | Semantics that have not been mapped to a component of an output register have a value of 1 |
| | | |
| Semantic values: | | Semantic values: |
Line 5,040: |
Line 5,045: |
| |- | | |- |
| | 0-7 | | | 0-7 |
− | | unsigned, Texture offset | + | | unsigned, Texture offset (Mipmap level 0 / base level) |
| |- | | |- |
− | | 8-31 | + | | 8-15 |
− | | 0xE0C080 | + | | unsigned, mipmap level 1 offset (usually 0x80) |
| + | |- |
| + | | 16-23 |
| + | | unsigned, mipmap level 2 offset (usually 0xC0) |
| + | |- |
| + | | 24-31 |
| + | | unsigned, mipmap level 3 offset (usually 0xE0) |
| |} | | |} |
| | | |
− | This register is used to set the procedural texture unit's offset. | + | This register is used to set the procedural texture unit's offset. Mipmap level 4-7 seems to be hardcoded at offset 0xF0, 0xF8, 0xFC and 0xFE . |
| | | |
| === GPUREG_PROCTEX_LUT === | | === GPUREG_PROCTEX_LUT === |
Line 5,242: |
Line 5,253: |
| | Previous | | | Previous |
| |} | | |} |
| + | |
| + | Using previous source in the first TEV stage returns the primary color, while previous buffer returns zero. |
| | | |
| === GPUREG_TEXENV''i''_OPERAND === | | === GPUREG_TEXENV''i''_OPERAND === |
Line 6,893: |
Line 6,906: |
| | unsigned, Fresnel FR LUT disabled (0 = enabled, 1 = disabled) | | | unsigned, Fresnel FR LUT disabled (0 = enabled, 1 = disabled) |
| |- | | |- |
− | | 20-22 | + | | 20 |
− | | unsigned, Term 1 reflection component RB LUT disabled (0 = enabled, 7 = disabled) | + | | unsigned, Term 1 reflection component RB LUT disabled (0 = enabled, 1 = disabled) |
| |- | | |- |
| | 21 | | | 21 |
− | | unsigned, Term 1 reflection component RG LUT disabled (0 = enabled, 7 = disabled) | + | | unsigned, Term 1 reflection component RG LUT disabled (0 = enabled, 1 = disabled) |
| |- | | |- |
| | 22 | | | 22 |
− | | unsigned, Term 1 reflection component RR LUT disabled (0 = enabled, 7 = disabled) | + | | unsigned, Term 1 reflection component RR LUT disabled (0 = enabled, 1 = disabled) |
| |- | | |- |
| | 24 | | | 24 |
Line 7,718: |
Line 7,731: |
| | | |
| This register sets whether to use the geometry shader configuration or reuse the vertex shader configuration for the geometry shader shading unit. | | This register sets whether to use the geometry shader configuration or reuse the vertex shader configuration for the geometry shader shading unit. |
| + | When disabled and the geometry unit is not in use, as configured by GPUREG_GEOSTAGE_CONFIG, uniforms, outmap mask, program code and swizzle data are propagated to the geometry shader unit. |
| | | |
| === GPUREG_START_DRAW_FUNC0 === | | === GPUREG_START_DRAW_FUNC0 === |