Changes

== PDN_FIQ_CNT ==

== PDN_FIQ_CNT ==

Writing bit1 to this register disables (?) FIQ interrupts.  

Writing bit1 to this register disables FIQ interrupts.  

This bit is set upon receipt of a FIQ interrupt and when [[SVC|svcUnbindInterrupt]] is called on the FIQ-abstraction [[ARM11_Interrupts#Private_Interrupts|software interrupt]] for the current core.

This bit is set upon receipt of a FIQ interrupt and when [[SVC|svcUnbindInterrupt]] is called on the FIQ-abstraction [[ARM11_Interrupts#Private_Interrupts|software interrupt]] for the current core.

It is cleared when binding that software interrupt to an event and after such an event is signaled.  

It is cleared when binding that software interrupt to an event and just before that event is signaled.

== PDN_SPI_CNT ==

== PDN_SPI_CNT ==