Changes

418 bytes added ,  03:06, 19 November 2016
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!  Description
 
!  Description
 
|-
 
|-
| 0-0x5
+
| 0-0x3
 
|  
 
|  
 
| MPCore software-interrupt.
 
| MPCore software-interrupt.
 +
|-
 +
| 0x4
 +
| Kernel
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| MPCore software-interrupt.
 +
|-
 +
| 0x5
 +
| Kernel
 +
| MPCore software-interrupt. Does apparently nothing.
 
|-
 
|-
 
| 0x6
 
| 0x6
 
| Kernel
 
| Kernel
| MPCore software-interrupt.
+
| MPCore software-interrupt. Extensively used by [[SVC|KernelSetState]] (and contains most of the actual code of the latter).
 
|-
 
|-
 
| 0x7
 
| 0x7
|  
+
| Kernel
 
| MPCore software-interrupt.
 
| MPCore software-interrupt.
 
|-
 
|-
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| MPCore software-interrupt. Used for scheduling.
 
| MPCore software-interrupt. Used for scheduling.
 
|-
 
|-
| 0x9-0xE
+
| 0x9
|  
+
| Kernel
 +
| MPCore software-interrupt. Used by, e.g., [[SVC|FlushProcessDataCache]].
 +
|-
 +
| 0xA
 +
| Kernel
 +
| MPCore software-interrupt.
 +
|-
 +
| 0xB-0xE
 +
|
 
| MPCore software-interrupt.
 
| MPCore software-interrupt.
 
|-
 
|-
 
| 0xF
 
| 0xF
 
| dmnt/debugger
 
| dmnt/debugger
| MPCore software-interrupt. Used to abstract FIQ (debug).
+
| MPCore software-interrupt. Used to abstract FIQ (debug). This interrupt is never sent to core2 nor core3 on N3DS.
 
|-
 
|-
 
| 0x1D
 
| 0x1D