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GPU/Internal Registers (edit)

Revision as of 05:58, 1 December 2015

4 bytes added ,  05:58, 1 December 2015
m
→‎Texturing registers (0x080-0x0FF)
Line 791: Line 791:  
|-
 
|-
 
| 0095
 
| 0095
−
| [[#GPUREG_TEXUNIT1_LOC|GPUREG_TEXUNIT1_LOC]]
+
| [[#GPUREG_TEXUNIT1_ADDR|GPUREG_TEXUNIT1_ADDR]]
 
|  
 
|  
 
|PICA_REG_TEXTURE1_ADDR
 
|PICA_REG_TEXTURE1_ADDR
Line 831: Line 831:  
|-
 
|-
 
| 009D
 
| 009D
−
| [[#GPUREG_TEXUNIT2_LOC|GPUREG_TEXUNIT2_LOC]]
+
| [[#GPUREG_TEXUNIT2_ADDR|GPUREG_TEXUNIT2_ADDR]]
 
|
 
|
 
|PICA_REG_TEXTURE2_ADDR
 
|PICA_REG_TEXTURE2_ADDR
Steveice10
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