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ARM11 Interrupts (edit)

Revision as of 05:42, 29 April 2015

871 bytes added , 05:42, 29 April 2015

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Interrupt priority is 0-0xF

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= Private Interrupts =

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Each CPU core has 32 software interrupts that are private and belong to that core. These interrupts are numbers 0-0x1F for each core. The hardware interrupts are not core-specific and start at interrupt ID 0x20.

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{| class="wikitable" border="1"

! IRQ

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| kernel

| MPCore watchdog.

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|}

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= Hardware Interrupts =

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There are 0x60 hardware interrupts starting at 0x20 and continuing up to 0x7F. These are not private and are accessible from any core.

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{| class="wikitable" border="1"

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! IRQ

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! Listener

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! Description

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| 0x28

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| ?

|}

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There are 2 tables in the ARM11 kernel: the first has 32 * 2(or 32 * 4) 8-byte entries. This table is for the private interrupts that belong to each core. The data for each interrupt can be found by doing table_base + (core_num * 0x100) + (intr_num * 8). The second table is for public hardware interrupts and the data for each interrupt can be retrieved by doing table_base + (intr_num * 8).

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