Changes

124 bytes added ,  02:38, 8 April 2015
m
Re-worded processid info.
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  Handle* thread=R1
 
  Handle* thread=R1
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The processorid parameter specifies which processors the thread can run on. Values 0 and 1 correspond to each CPU, respectively. -1 means all CPUs, and -2 means the default CPU for the process (0 for applications, 1 for system services). Games usually create threads using -2.
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The processorid parameter specifies which processor the thread can run on. Non-negative values correspond to a specific CPU. (e.g. 0 for the Appcore and 1 for the Syscore on Old3DS) Special value -1 means all CPUs, and -2 means the default CPU for the process (Read from the [[ExHeader|NCCD/Extended Header]], usually 0 for applications, 1 for system services). Games usually create threads using -2.
 
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The thread priority value must be in the following range: 0x0..0x3F.
      
With the Old3DS kernel, the s32 processorid must be <=2.
 
With the Old3DS kernel, the s32 processorid must be <=2.
    
With the New3DS kernel: processorid must be <= <total cores(MPCore "SCU Configuration Register" CPU number value + 1)>. When processorid==0x2 and the process is not an APPLICATION mem-region process, exheader kernel-flags bitmask 0x2000 must be set otherwise error 0xD9001BEA is returned. When processorid==0x3 and the process is not an APPLICATION mem-region process, error 0xD9001BEA is returned. These are the only restriction checks done by the kernel for processorid.
 
With the New3DS kernel: processorid must be <= <total cores(MPCore "SCU Configuration Register" CPU number value + 1)>. When processorid==0x2 and the process is not an APPLICATION mem-region process, exheader kernel-flags bitmask 0x2000 must be set otherwise error 0xD9001BEA is returned. When processorid==0x3 and the process is not an APPLICATION mem-region process, error 0xD9001BEA is returned. These are the only restriction checks done by the kernel for processorid.
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The thread priority value must be in the following range: 0x0..0x3F.
    
The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address.
 
The stacktop must be aligned to 0x8-bytes, otherwise when not aligned to 0x8-bytes the ARM11 kernel clears the low 3-bits of the stacktop address.
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