Line 1: |
Line 1: |
− | == Registers ==
| + | = Registers = |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
− | ! NAME | + | ! Old3DS |
− | ! PHYSICAL ADDRESS | + | ! Name |
− | ! PROCESS ADDRESS | + | ! Address |
− | ! WIDTH | + | ! Width |
| + | ! Used by |
| |- | | |- |
− | | REG_I2C1DATA | + | | style="background: green" | Yes |
| + | | I2C1_DATA |
| | 0x10161000 | | | 0x10161000 |
− | | 0x1EC61000
| |
| | 1 | | | 1 |
| + | | |
| |- | | |- |
− | | REG_I2C1CNT | + | | style="background: green" | Yes |
| + | | [[#I2C_CNT|I2C1_CNT]] |
| | 0x10161001 | | | 0x10161001 |
− | | 0x1EC61001
| |
| | 1 | | | 1 |
| + | | |
| |- | | |- |
− | | REG_I2C1CNTEX | + | | style="background: green" | Yes |
| + | | I2C1_CNTEX |
| | 0x10161002 | | | 0x10161002 |
− | | 0x1EC61002
| |
| | 2 | | | 2 |
| + | | |
| |- | | |- |
− | | REG_I2C1SCL | + | | style="background: green" | Yes |
| + | | I2C1_SCL |
| | 0x10161004 | | | 0x10161004 |
− | | 0x1EC61004
| |
| | 2 | | | 2 |
| + | | |
| |- | | |- |
− | | REG_I2C2DATA | + | | style="background: green" | Yes |
| + | | I2C2_DATA |
| | 0x10144000 | | | 0x10144000 |
− | | 0x1EC44000
| |
| | 1 | | | 1 |
| + | | |
| |- | | |- |
− | | REG_I2C2CNT | + | | style="background: green" | Yes |
| + | | [[#I2C_CNT|I2C2_CNT]] |
| | 0x10144001 | | | 0x10144001 |
− | | 0x1EC44001
| |
| | 1 | | | 1 |
| + | | |
| |- | | |- |
− | | REG_I2C2CNTEX | + | | style="background: green" | Yes |
| + | | I2C2_CNTEX |
| | 0x10144002 | | | 0x10144002 |
− | | 0x1EC44002
| |
| | 2 | | | 2 |
| + | | |
| |- | | |- |
− | | REG_I2C2SCL | + | | style="background: green" | Yes |
| + | | I2C2_SCL |
| | 0x10144004 | | | 0x10144004 |
− | | 0x1EC44004
| |
| | 2 | | | 2 |
| + | | |
| |- | | |- |
− | | REG_I2C3DATA | + | | style="background: green" | Yes |
| + | | I2C3_DATA |
| | 0x10148000 | | | 0x10148000 |
− | | 0x1EC48000
| |
| | 1 | | | 1 |
| + | | |
| |- | | |- |
− | | REG_I2C3CNT | + | | style="background: green" | Yes |
| + | | [[#I2C_CNT|I2C3_CNT]] |
| | 0x10148001 | | | 0x10148001 |
− | | 0x1EC48001
| |
| | 1 | | | 1 |
| + | | |
| |- | | |- |
− | | REG_I2C3CNTEX | + | | style="background: green" | Yes |
| + | | I2C3_CNTEX |
| | 0x10148002 | | | 0x10148002 |
− | | 0x1EC48002
| |
| | 2 | | | 2 |
| + | | |
| |- | | |- |
− | | REG_I2C3SCL | + | | style="background: green" | Yes |
| + | | I2C3_SCL |
| | 0x10148004 | | | 0x10148004 |
− | | 0x1EC48004
| |
| | 2 | | | 2 |
| + | | |
| + | |} |
| + | |
| + | == I2C_CNT == |
| + | {| class="wikitable" border="1" |
| + | ! BIT |
| + | ! DESCRIPTION |
| + | |- |
| + | | 0 |
| + | | Stop (0=No, 1=Stop/last byte) |
| + | |- |
| + | | 1 |
| + | | Start (0=No, 1=Start/first byte) |
| + | |- |
| + | | 2 |
| + | | Pause (0=Transfer Data, 1=Pause after Error, used with/after Stop) |
| + | |- |
| + | | 4 |
| + | | Ack Flag (0=Error, 1=Okay) (For DataRead: W, for DataWrite: R) |
| + | |- |
| + | | 5 |
| + | | Data Direction (0=Write, 1=Read) |
| + | |- |
| + | | 6 |
| + | | Interrupt Enable (0=Disable, 1=Enable) |
| + | |- |
| + | | 7 |
| + | | Start/busy (0=Ready, 1=Start/busy) |
| |} | | |} |
| | | |
− | == I2C Devices ==
| + | = I2C Devices = |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| ! Device id | | ! Device id |
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| | | |
| See the datasheet linked to on the [[Hardware]] page for reference. From that datasheet, for the structure of the I2C register address u8: "Bit 0 is not used, bits 2:1 select the channel, bits 6:3 select one of the UART internal registers. Bit 7 is not used with the I2C-bus interface, but it is used by the SPI interface to indicate a read or a write operation." | | See the datasheet linked to on the [[Hardware]] page for reference. From that datasheet, for the structure of the I2C register address u8: "Bit 0 is not used, bits 2:1 select the channel, bits 6:3 select one of the UART internal registers. Bit 7 is not used with the I2C-bus interface, but it is used by the SPI interface to indicate a read or a write operation." |
− |
| |
− | = I2CCNT =
| |
− | {| class="wikitable" border="1"
| |
− | |+ REG_I2CxCNT
| |
− | ! BIT
| |
− | ! DESCRIPTION
| |
− | |-
| |
− | | 0
| |
− | | HOLD (0=Last byte of transaction, 1=More bytes coming)
| |
− | |-
| |
− | | 2
| |
− | | Error flag/ack?
| |
− | |-
| |
− | | 4
| |
− | | Read mode related?
| |
− | |-
| |
− | | 5
| |
− | | Read mode?
| |
− | |-
| |
− | | 6
| |
− | | IRQ enable?
| |
− | |-
| |
− | | 7
| |
− | | Enable?
| |
− | |}
| |