PXIDEV:SPIMultiWriteRead
RequestEdit
Index Word | Description |
---|---|
0 | Header code [0x000D0688] |
1-2 | Header |
3 | Header Size |
4 | Header TransferOption |
5-6 | Header WaitOperation |
7 | Write Buffer 1 Size |
8 | Write Buffer 1 TransferOption |
9-10 | Write Buffer 1 WaitOperation |
11 | Read Buffer 1 Size |
12 | Read Buffer 1 TransferOption |
13-14 | Read Buffer 1 WaitOperation |
15 | Write Buffer 2 Size |
16 | Write Buffer 2 TransferOption |
17-18 | Write Buffer 2 WaitOperation |
19 | Read Buffer 2 Size |
20 | Read Buffer 2 TransferOption |
21-22 | Read Buffer 2 WaitOperation |
23-24 | Footer |
25 | Footer Size |
26 | Footer TransferOption |
27 | (WriteBuffer1Size << 8) | 0x6 |
28 | Write Buffer 1 Pointer |
29 | (WriteBuffer2Size << 8) | 0x16 |
30 | Write Buffer 2 Pointer |
31 | (ReadBuffer1Size << 8) | 0x24 |
32 | Read Buffer 1 Pointer |
33 | (ReadBuffer2Size << 8) | 0x34 |
34 | Read Buffer 2 Pointer |
ResponseEdit
Index Word | Description |
---|---|
0 | Header code |
1 | Result code |
DescriptionEdit
Writes the header to the CARDSPI FIFO, writes the first write buffer, reads the response to the first read buffer, writes the second write buffer, reads the response to the second read buffer, and writes the footer. To use this, the ARM9 Access Control bit for SPICARD must be set in one of the currently running ARM11 processes.
If the header, footer, or any of the buffers have a size of 0, their respective operation will be skipped.