Registers
| NAME
|
PHYSICAL ADDRESS
|
PROCESS VIRTUAL ADDRESS
|
KERNEL VIRTUAL ADDRESS
|
WIDTH
|
| REG_LCDCOLORFILLMAIN
|
0x10202204
|
0x1ED02204
|
0xFFFD6204
|
4
|
| REG_LCDCOLORFILLSUB
|
0x10202A04
|
0x1ED02A04
|
0xFFFD6A04
|
4
|
REG_*MAIN registers are used for the top LCD, while SUB is used for the bottom LCD. The registers for the main LCD is located at 0x1EF00400, while the sub LCD registers are located at 0x1EF00500.
REG_LCDCOLORFILL
| Bit
|
Description
|
| 7-0
|
Red component intensity
|
| 15-8
|
Green component intensity
|
| 23-16
|
Blue component intensity
|
| 24
|
Enable
|
| 31-25
|
?
|
When the enable bit is set, the specified solid color is displayed on the LCD instead of the framebuffer.
0x1EF00X5C
| Bit
|
Description
|
| 15-0
|
Framebuffer width
|
| 31-16
|
Framebuffer height
|
This controls the displayed LCD framebuffer dimensions.
0x1EF00X70
| Bit
|
Description
|
| 15-0
|
Framebuffer format
|
| 31-16
|
?
|
Framebuffer format
| Bit
|
Description
|
| 3-0
|
Color format
|
| 4
|
Unused?
|
| 5
|
Set when the main screen 3D right framebuffer address is set.
|
| 6
|
1 = main screen, 0 = sub screen. However if bit5 is set, this bit is cleared.
|
| 7
|
?
|
| 9-8
|
Value 1 = unknown, 3 = unknown.
|
| 15-10
|
Unused?
|
Framebuffer color formats
| Value
|
Description
|
| 0
|
GL_RGBA8_OES
|
| 1
|
GL_RGB8_OES
|
| 2
|
GL_RGB565_OES
|
| 3
|
GL_RGB5_A1_OES
|
| 4
|
GL_RGBA4_OES
|
0x1EF00X78
| Bit
|
Description
|
| 0
|
LCD framebuffer to display (0=first, 1=second)
|
| 7-1
|
?
|
| 31-8
|
Unused
|
0x1EF00X90
| Bit
|
Description
|
| 31-0
|
Framebuffer width * pixel byte-size.
|
Framebuffers
| Address
|
Description
|
| 0x1EF00468
|
Main LCD, first framebuffer for 3D left
|
| 0x1EF0046C
|
Main LCD, second framebuffer for 3D left
|
| 0x1EF00494
|
Main LCD, first framebuffer for 3D right
|
| 0x1EF00498
|
Main LCD, second framebuffer for 3D right
|
| 0x1EF00568
|
Sub LCD, first framebuffer
|
| 0x1EF0056C
|
Sub LCD, second framebuffer
|
| 0x1EF00594
|
Sub LCD, unused first framebuffer
|
| 0x1EF00598
|
Sub LCD, unused second framebuffer
|
The above framebuffer registers contains the physical address for each framebuffer, normally located in FCRAM in the application's GSP heap. When other processes use GSP as well, the framebuffers for the process is stored in VRAM instead.
These LCD framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)
Both of the 3D screen left/right framebuffers are displayed regardless of the 3D slider's state, however when the 3D slider is set to "off" the 3D effect is disabled. Normally when the 3D slider's state is set to "off" the left/right framebuffer addresses are set to the same physical address. When the 3D effect is disabled and the left/right framebuffers are set to separate addresses, the LCD seems to alternate between displaying the left/right framebuffer each frame.