GPU/External Registers
Map
- 0x1EF00400 is the top screen
- 0x1EF00500 is the bottom screen
Init Values from nngxInitialize for Top Screen
- 0x1EF00400 = 0x1C2
- 0x1EF00404 = 0xD1
- 0x1EF00408 = 0x1C1
- 0x1EF0040C = 0x1C1
- 0x1EF00410 = 0
- 0x1EF00414 = 0xCF
- 0x1EF00418 = 0xD1
- 0x1EF0041C = 0x1C501C1
- 0x1EF00420 = 0x10000
- 0x1EF00424 = 0x19D
- 0x1EF00428 = 2
- 0x1EF0042C = 0x1C2
- 0x1EF00430 = 0x1C2
- 0x1EF00434 = 0x1C2
- 0x1EF00438 = 1
- 0x1EF0043C = 2
- 0x1EF00440 = 0x1960192
- 0x1EF00444 = 0
- 0x1EF00448 = 0
- 0x1EF0045C = 0x19000F0
- 0x1EF00460 = 0x1c100d1
- 0x1EF00464 = 0x1920002
- 0x1EF00470 = 0x80340
- 0x1EF0049C = 0
More Init Values from nngxInitialize for Top Screen
- 0x1EF00468 = 0x18300000, later changed by GSP module when updating state, framebuffer
- 0x1EF0046C = 0x18300000, later changed by GSP module when updating state, framebuffer
- 0x1EF00494 = 0x18300000
- 0x1EF00498 = 0x18300000
- 0x1EF00478 = 1, doesn't stay 1, read as 0
- 0x1EF00474 = 0x10501
0x1EF00X90
| Bit | Description |
|---|---|
| 3-0 | ? |
| 7-4 | Controls the framebuffer dimensions and/or color format |
| 31-7 | ? |
This register controls how the LCD framebuffer is displayed.
Framebuffers
| Address | Description |
|---|---|
| 0x1EF00468 | Main LCD, first framebuffer for 3D left |
| 0x1EF0046C | Main LCD, second framebuffer for 3D left |
| 0x1EF00494 | Main LCD, first framebuffer for 3D right |
| 0x1EF00498 | Main LCD, second framebuffer for 3D right |
| 0x1EF00568 | Sub LCD, first framebuffer |
| 0x1EF0056C | Sub LCD, second framebuffer |
The above framebuffer registers contain the VRAM physical address for each framebuffer.
The GSP module DMAs LCD framebuffers from the application's GSP heap located in FCRAM into VRAM. These framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)
The 3D screen left/right framebuffers are always displayed regardless of the 3D slider's state, when the 3D slider's state is set to "off" the framebuffer registers are set to the same VRAM physical address.