File:Stp PCLK VSYNC HSYNC full.jpg
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SummaryEdit
A rougly 2.6ms long plot of captured video control signals (CLK, H-, VSYNC) of an O3DS.
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 04:41, 26 April 2020 | 1,828 × 106 (80 KB) | LeSpirou (talk | contribs) | A rougly 2.6ms long plot of captured video control signals (CLK, H-, VSYNC) of an O3DS. |
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