EMMC Registers

Revision as of 21:28, 24 January 2015 by Neobrain (talk | contribs) (Update dead links)
NAME PHYSICAL ADDRESS WIDTH
REG_SDCMD 0x10006000 2
REG_SD??? 0x10006002 2
REG_SDCMDARG0 0x10006004 2
REG_SDCMDARG1 0x10006006 2
REG_SDSTOP 0x10006008 2
REG_SDBLKCOUNT 0x1000600a 2
REG_SDRESP0-7 0x1000600c 2*8
REG_SDSTATUS0 0x1000601c 2
REG_SDSTATUS1 0x1000601e 2
REG_SD??? 0x10006020 2
REG_SD??? 0x10006022 2
REG_SDCLKCTL 0x10006024 2
REG_SDBLKLEN 0x10006026 2
REG_SDOPT 0x10006028 2
REG_SDFIFO 0x10006030 2

The IO interface for SDMC/NAND seems to be very similar to the DSi; see libnds for sample code and documentation.

3DS SDMC/NAND IO registers are located at 0x10006000 and apparently mirrored at 0x10007000. It seems the 0x10007000 mirror is never used on retail units.