Registers
| NAME
|
PHYSICAL ADDRESS
|
WIDTH
|
| REG_RSACNT
|
0x1000B000
|
0x04
|
| REG_RSASLOT0
|
0x1000B100
|
0x10
|
| REG_RSASLOT1
|
0x1000B110
|
0x10
|
| REG_RSASLOT2
|
0x1000B120
|
0x10
|
| REG_RSASLOT3
|
0x1000B130
|
0x10
|
| REG_RSAKEY
|
0x1000B400
|
0x100
|
| REG_RSATXT
|
0x1000B800
|
0x100
|
REG_RSACNT
| Bit
|
Description
|
| 0
|
Busy
|
| 1
|
Keyslot select related?
|
| 4-7
|
Keyslot
|
| 8-9
|
Should be set to 0x3 before accessing REG_RSAMSG
|
REG_RSASLOT
| Start
|
Width
|
Description
|
| 0x0
|
0x4
|
REG_RSASLOTCNT
|
| 0x4
|
0x4
|
?
|
| 0x8
|
0x4
|
?
|
| 0xC
|
0x4
|
?
|
REG_RSASLOTCNT
| Bits
|
Description
|
| 0
|
Set
|
| 31-1
|
?
|
REG_RSAKEY
The RSA public key for the selected keyslot can be written here. When writing the RSA key, the key is copied to 0x1000B500-RSA_bytesize, length RSA_bytesize. The engine determines the RSA byte-size by checking where the first word of the key was written. The engine only supports RSA-2048 and below.
REG_RSATXT
The RSA signature can be written here, and the data read from here is the message. When writing the RSA signature, the signature must be prepended with zeroes until it is a multiple of 8 bytes, and the end of the signature must align with the end of the register area.
The PKCS message padding must be manually checked by software, as hardware will only do raw RSA operations.
Keyslots usage
| Keyslot
|
Description
|
| 0
|
Arbitrary
|
| 1
|
CXI access desc (following the exheader)
|
| 2-3
|
Unused
|