Difference between revisions of "IRU:SetSleepModeState"
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(Created page with "=Request= {| class="wikitable" border="1" |- ! Index Word ! Description |- | 0 | Header code [0x00120040] |- | 1 | u32 value |} =Response= {| class="wikitable" border="1" |- !...") |
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− | For input value 1, the I2C-IR IOState register bit0 is set to value 1, and sleep-mode is enabling by setting IER register bit4(same register pokes done when a data transfer ends). For input value 0, those register bits are set to value 0 instead of 1(same register pokes done when a data transfer starts). | + | For input value 1, the I2C-IR IOState register bit0 is set to value 1, and sleep-mode is enabling by setting IER register bit4(same register pokes done when a data transfer ends). For input value 0, those register bits are set to value 0 instead of 1(same register pokes done when a data transfer starts). These register pokes are only done automatically for data-transfer start/end when the value for [[IRU:SetSleepModeActive]] is value 1. |
Latest revision as of 18:09, 25 February 2014
Request[edit]
Index Word | Description |
---|---|
0 | Header code [0x00120040] |
1 | u32 value |
Response[edit]
Index Word | Description |
---|---|
0 | Header code |
1 | Result code |
Description[edit]
For input value 1, the I2C-IR IOState register bit0 is set to value 1, and sleep-mode is enabling by setting IER register bit4(same register pokes done when a data transfer ends). For input value 0, those register bits are set to value 0 instead of 1(same register pokes done when a data transfer starts). These register pokes are only done automatically for data-transfer start/end when the value for IRU:SetSleepModeActive is value 1.