Difference between revisions of "GPU/External Registers"

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== 0x1EF00X90 ==
 
== 0x1EF00X90 ==
 +
{| class="wikitable" border="1"
 +
!  Bit
 +
!  Description
 +
|-
 +
| 3-0
 +
| ?
 +
|-
 +
| 6-4
 +
| Controls the framebuffer dimensions and color format
 +
|-
 +
| 31-7
 +
| ?
 +
|}
 +
 
This register controls how the LCD framebuffer is displayed.
 
This register controls how the LCD framebuffer is displayed.
  
 
== Framebuffers ==
 
== Framebuffers ==
 
The GSP module DMAs LCD framebuffers from the GSP module heap in FCRAM into VRAM. These framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)
 
The GSP module DMAs LCD framebuffers from the GSP module heap in FCRAM into VRAM. These framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)

Revision as of 09:29, 29 December 2012

Map

  • 0x1EF00400 is the top screen
  • 0x1EF00500 is the bottom screen

Init Values from nngxInitialize for Top Screen

  • 0x1EF00400 = 0x1C2
  • 0x1EF00404 = 0xD1
  • 0x1EF00408 = 0x1C1
  • 0x1EF0040C = 0x1C1
  • 0x1EF00410 = 0
  • 0x1EF00414 = 0xCF
  • 0x1EF00418 = 0xD1
  • 0x1EF0041C = 0x1C501C1
  • 0x1EF00420 = 0x10000
  • 0x1EF00424 = 0x19D
  • 0x1EF00428 = 2
  • 0x1EF0042C = 0x1C2
  • 0x1EF00430 = 0x1C2
  • 0x1EF00434 = 0x1C2
  • 0x1EF00438 = 1
  • 0x1EF0043C = 2
  • 0x1EF00440 = 0x1960192
  • 0x1EF00444 = 0
  • 0x1EF00448 = 0
  • 0x1EF0045C = 0x19000F0
  • 0x1EF00460 = 0x1c100d1
  • 0x1EF00464 = 0x1920002
  • 0x1EF00470 = 0x80340
  • 0x1EF0049C = 0

More Init Values from nngxInitialize for Top Screen

  • 0x1EF00468 = 0x18300000, later changes to 0x181e6000, framebuffer
  • 0x1EF0046C = 0x18300000, later changes to 0x18273000, framebuffer
  • 0x1EF00494 = 0x18300000
  • 0x1EF00498 = 0x18300000
  • 0x1EF00478 = 1, doesn't stay 1, read as 0
  • 0x1EF00474 = 0x10501

0x1EF00X90

Bit Description
3-0 ?
6-4 Controls the framebuffer dimensions and color format
31-7 ?

This register controls how the LCD framebuffer is displayed.

Framebuffers

The GSP module DMAs LCD framebuffers from the GSP module heap in FCRAM into VRAM. These framebuffers normally contain the last rendered frames from the GPU. The color format is BGR8. The framebuffers are drawn from left-to-right, instead of top-to-bottom.(Thus the beginning of the framebuffer is drawn starting at the left side of the screen)