Difference between revisions of "GSPGPU:WriteHWRegsWithMask"
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(Convert to IPC templates) |
(Fix reponse section saying "request") |
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Line 9: | Line 9: | ||
=Response= | =Response= | ||
− | {{IPC/Request| | + | {{IPC/Request|Response}} |
{{IPC/RequestHeader|0x0002|2|0}} | {{IPC/RequestHeader|0x0002|2|0}} | ||
{{IPC/RequestEntry|Header code}} | {{IPC/RequestEntry|Header code}} |
Latest revision as of 12:50, 18 September 2024
Request[edit]
Request Word | Description | ||||||||
---|---|---|---|---|---|---|---|---|---|
0 |
| ||||||||
1 | GPU address based at 0x1EB00000, must be word-aligned | ||||||||
2 | Size, must be <=0x80 and word-aligned | ||||||||
3 | Descriptor for static buffer (id 0) | ||||||||
4 | Data pointer | ||||||||
5 | Descriptor for static buffer (id 1) | ||||||||
6 | Mask data pointer |
Response[edit]
Response Word | Description | ||||||||
---|---|---|---|---|---|---|---|---|---|
0 |
| ||||||||
1 | Header code | ||||||||
2 | Result code |
Description[edit]
The GPU register offset must be <0x420000. GPU register = (register & ~maskword) | (data & maskword).