Difference between revisions of "SPICARD Registers"

From 3dbrew
Jump to navigation Jump to search
Line 61: Line 61:
 
!  DESCRIPTION
 
!  DESCRIPTION
 
|-
 
|-
| 5-0
+
| 2-0
 
| [[Filesystem_services#CardSpiBaudRate|Baud Rate]]
 
| [[Filesystem_services#CardSpiBaudRate|Baud Rate]]
 +
|-
 +
| 6-7
 +
| Unused device select.
 
|-
 
|-
 
| 12
 
| 12
Line 73: Line 76:
 
| Trigger (0 = idle, 1 = busy)
 
| Trigger (0 = idle, 1 = busy)
 
|}
 
|}
 +
 +
This register seems to have a bug where the lower 8 bits are shifted up by 16 when reading them back.
  
 
== REG_SPICARDASSERT ==
 
== REG_SPICARDASSERT ==

Revision as of 01:05, 8 May 2019

Registers

Old3DS Name Address Width Used by
Yes REG_SPICARDCNT 0x1000D800 4
Yes REG_SPICARDASSERT 0x1000D804 4
Yes REG_SPICARDSIZE 0x1000D808 4
Yes REG_SPICARDFIFO 0x1000D80C 4
Yes REG_SPICARDFIFOSTAT 0x1000D810 4
Yes ? 0x1000D814 4
Yes ? 0x1000D818 4
Yes ? 0x1000D81C 4

REG_SPICARDCNT

BIT DESCRIPTION
2-0 Baud Rate
6-7 Unused device select.
12 Bus Mode
13 Transfer Mode (0 = read, 1 = write)
15 Trigger (0 = idle, 1 = busy)

This register seems to have a bug where the lower 8 bits are shifted up by 16 when reading them back.

REG_SPICARDASSERT

When deasserting the card, this registers is set to 0. Presumably contains 1 when the card is asserted.

REG_SPICARDSIZE

BIT DESCRIPTION
31-0 Transfer size

REG_SPICARDFIFO

BIT DESCRIPTION
31-0 Data

REG_SPICARDFIFOSTAT

BIT DESCRIPTION
0 FIFO Full (0 = not full, 1 = full)