Difference between revisions of "IPCCommandExample"

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(Testing stuff)
m
 
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{{IPC/RequestEntry|Header code}}
 
{{IPC/RequestEntry|Header code}}
 
{{IPC/RequestEntry|Result code}}
 
{{IPC/RequestEntry|Result code}}
{{IPC/TranslateStaticBuffer|{{Tooltip|Output data pointer|bla}}|0}}
+
{{IPC/TranslateStaticBuffer|Output data pointer|0}}
 
{{IPC/RequestEnd}}
 
{{IPC/RequestEnd}}
  
 
=Description=
 
=Description=
 
The GPU register offset must be <0x420000.
 
The GPU register offset must be <0x420000.

Latest revision as of 13:12, 10 September 2016

Request[edit]

Index Word Description
0 Header code [0x00040080]
1 GPU address based at 0x1EB00000, must be word-aligned
2 Size, must be <=0x80 and word-aligned

The handler for this IPC command expects the following 0x100-bytes after the beginning of the above command buffer:

Index Word Description
0 Header code [0x00040080]
1 Descriptor for static buffer (id 0)
2 Output buffer address

Response[edit]

Index Word Description
0 Header code
1 Result code
2 Descriptor for static buffer (id 0)
3 Output data pointer

Description[edit]

The GPU register offset must be <0x420000.