Difference between revisions of "GPIO Registers"
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| Line 57: | Line 57: | ||
! Description | ! Description | ||
|- | |- | ||
| − | | RTC_CNT | + | | RTC_CNT |
| 0x10147100 | | 0x10147100 | ||
| 2 | | 2 | ||
| − | | ? | + | | 0x8000 = enabled?, 0x4000 = latch, other bits are to-be-latched bits in order of the regs below, starting from bit 0. TIME1 and TIME2 are one bit (0x10) together |
|- | |- | ||
| RTC_REG_STAT1 | | RTC_REG_STAT1 | ||
| Line 82: | Line 82: | ||
| The free general purpose rtc register (command 7). Bitswapped | | The free general purpose rtc register (command 7). Bitswapped | ||
|- | |- | ||
| − | | | + | | RTC_REG_TIME1 |
| 0x10147120 | | 0x10147120 | ||
| 4 | | 4 | ||
| − | | Byte-wise bit-swapped (bit7 is bit0, etc.) BCD RTC (byte0 = seconds, byte1 = minutes, byte2 = hours, byte3 = day | + | | Byte-wise bit-swapped (bit7 is bit0, etc.) BCD RTC (byte0 = seconds, byte1 = minutes, byte2 = hours, byte3 = day of week) |
|- | |- | ||
| − | | | + | | RTC_REG_TIME2 |
| 0x10147124 | | 0x10147124 | ||
| − | | 4 | + | | 4 (3?) |
| − | | | + | | Day, month and year all byte-wise bit-swapped |
|- | |- | ||
| − | | | + | | RTC_REG_ALRMTIM1 |
| 0x10147130 | | 0x10147130 | ||
| − | | 4 | + | | 4 (3?) |
| − | | | + | | Rtc alarm time register 1 (command 4). Byte-wise bit-swapped |
|- | |- | ||
| − | | | + | | RTC_REG_ALRMTIM2 |
| 0x10147134 | | 0x10147134 | ||
| − | | 4 | + | | 4 (3?) |
| − | | | + | | Rtc alarm time register 2 (command 5). Byte-wise bit-swapped |
|- | |- | ||
| − | | | + | | RTC_REG_COUNT |
| 0x10147140 | | 0x10147140 | ||
| − | | 4 | + | | 4 (3?) |
| − | | | + | | Rtc dsi counter register (ex command 0). Byte-wise bit-swapped |
|- | |- | ||
| RTC_REG_FOUT1 | | RTC_REG_FOUT1 | ||
| Line 117: | Line 117: | ||
| Rtc dsi fout register 2 (ex command 2). Bitswapped | | Rtc dsi fout register 2 (ex command 2). Bitswapped | ||
|- | |- | ||
| − | | | + | | RTC_REG_ALRMDAT2 |
| 0x10147160 | | 0x10147160 | ||
| − | | 4 | + | | 4 (3?) |
| − | | | + | | Rtc dsi alarm date register 1 (ex command 4). Byte-wise bit-swapped |
|- | |- | ||
| − | | | + | | RTC_REG_ALRMDAT2 |
| 0x10147164 | | 0x10147164 | ||
| − | | 4 | + | | 4 (3?) |
| − | | | + | | Rtc dsi alarm date register 2 (ex command 5). Byte-wise bit-swapped |
|- | |- | ||
|} | |} | ||
Revision as of 14:02, 21 September 2019
Registers
GPIO
| Name | Address | Width | GPIO bitmasks associated with this register |
|---|---|---|---|
| GPIO_DATA0 | 0x10147000 | 2 | 0x1, 0x2, 0x4 |
| GPIO_DATA1 | 0x10147010 | 4 | 0x8, 0x10 |
| GPIO_DATA2 | 0x10147014 | 2 | 0x20 |
| GPIO_DATA3 | 0x10147020 | 2 | 0x40, 0x80, 0x100, 0x200, 0x400, 0x800, 0x1000, 0x2000, 0x4000, 0x8000, 0x10000, 0x20000 |
| GPIO_DATA3_INTERRUPT_CLEAR | 0x10147022 | 2 | 0x40, 0x80, 0x100, 0x200, 0x400, 0x800, 0x1000, 0x2000, 0x4000, 0x8000, 0x10000, 0x20000 |
| ?? | 0x10147024 | 2 | 0x40, 0x80, 0x100, 0x200, 0x400, 0x800, 0x1000, 0x2000, 0x4000, 0x8000, 0x10000, 0x20000 |
| ? | 0x10147026 | 2 | ? |
| GPIO_DATA4 | 0x10147028 | 2 | 0x40000 |
Legacy RTC
| Name | Address | Width | Description |
|---|---|---|---|
| RTC_CNT | 0x10147100 | 2 | 0x8000 = enabled?, 0x4000 = latch, other bits are to-be-latched bits in order of the regs below, starting from bit 0. TIME1 and TIME2 are one bit (0x10) together |
| RTC_REG_STAT1 | 0x10147110 | 1 | Rtc status register 1 (command 0). Bitswapped |
| RTC_REG_STAT2 | 0x10147111 | 1 | Rtc status register 2 (command 1). Bitswapped |
| RTC_REG_CLKADJ | 0x10147112 | 1 | Rtc clock adjustment register (command 6). Bitswapped |
| RTC_REG_FREE | 0x10147113 | 1 | The free general purpose rtc register (command 7). Bitswapped |
| RTC_REG_TIME1 | 0x10147120 | 4 | Byte-wise bit-swapped (bit7 is bit0, etc.) BCD RTC (byte0 = seconds, byte1 = minutes, byte2 = hours, byte3 = day of week) |
| RTC_REG_TIME2 | 0x10147124 | 4 (3?) | Day, month and year all byte-wise bit-swapped |
| RTC_REG_ALRMTIM1 | 0x10147130 | 4 (3?) | Rtc alarm time register 1 (command 4). Byte-wise bit-swapped |
| RTC_REG_ALRMTIM2 | 0x10147134 | 4 (3?) | Rtc alarm time register 2 (command 5). Byte-wise bit-swapped |
| RTC_REG_COUNT | 0x10147140 | 4 (3?) | Rtc dsi counter register (ex command 0). Byte-wise bit-swapped |
| RTC_REG_FOUT1 | 0x10147150 | 1 | Rtc dsi fout register 1 (ex command 1). Bitswapped |
| RTC_REG_FOUT2 | 0x10147151 | 1 | Rtc dsi fout register 2 (ex command 2). Bitswapped |
| RTC_REG_ALRMDAT2 | 0x10147160 | 4 (3?) | Rtc dsi alarm date register 1 (ex command 4). Byte-wise bit-swapped |
| RTC_REG_ALRMDAT2 | 0x10147164 | 4 (3?) | Rtc dsi alarm date register 2 (ex command 5). Byte-wise bit-swapped |
Descriptions
0x10147010
| Bit | Description |
|---|---|
| 24 | Enable/disable? GPIO interrupt 0x64 (bitmask 0x8) |
| 25 | Enable/disable? GPIO interrupt 0x66 (bitmask 0x10) |
0x10147026
| Bit | Description |
|---|---|
| 0-8 | ? |
| 9 | Enable/disable interrupt 0x71. |
| 10-15 | ? |
GPIO_DATA
GPIO_DATA0
| Bit | Description |
|---|---|
| 0-2 | Used for GPIO bitmask 0x7. |
| 1 | DS EXTKEYIN Pen down (0 = touching, 1 = not touching) |
| 3 | Unused by GPIO-sysmodule and TwlBg. |
| 4 | Only used by Boot11. |
| 5-15 | Unused by GPIO-sysmodule and TwlBg. |
GPIO_DATA1
| Bit | Description |
|---|---|
| 0-1 | Used for GPIO bitmask 0x18. |
| 2-31 | Unused by GPIO-sysmodule and TwlBg. |
GPIO_DATA2
| Bit | Description |
|---|---|
| 0 | Used for GPIO bitmask 0x20. |
| 1-15 | Unused by GPIO-sysmodule and TwlBg. |
GPIO_DATA3
| Bit | Description |
|---|---|
| 0-11 | Used for GPIO bitmask 0x3FFC0. |
| 12-31 | Unused by GPIO-sysmodule and TwlBg. |
GPIO_DATA4
| Bit | Description |
|---|---|
| 0 | Used for GPIO bitmask 0x40000. |
| 1-15 | Unused by GPIO-sysmodule and TwlBg. |
Default values
After bootrom initialization, these are the values of the registers:
| Address | Value |
|---|---|
| 0x10147000 | 0x0003 |
| 0x10147010 | 0x00000002 |
| 0x10147014 | 0x0000 |
| 0x10147020 | 0x00000DFB |
| 0x10147024 | 0x00000000 |
| 0x10147028 | 0x0000 |