Difference between revisions of "IPCCommandExample"
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(Created page with "=Request= {{IPC/Request}} {{#vardefine:ipc_offset|0}} {{IPC/RequestEntry|Header code [0x00040080]}} {{IPC/RequestEntry|GPU address based at 0x1EB00000, must be word-aligne...") |
(As suggested by wwylele) |
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{{IPC/RequestEnd}} | {{IPC/RequestEnd}} | ||
− | + | {{IPC/RequestStaticBuffers}} | |
− | {{IPC/ | ||
{{#vardefine:ipc_offset|0}} | {{#vardefine:ipc_offset|0}} | ||
{{IPC/RequestEntry|Header code [0x00040080]}} | {{IPC/RequestEntry|Header code [0x00040080]}} |
Revision as of 15:46, 9 September 2016
Request
Index Word | Description |
---|---|
0 | Header code [0x00040080] |
1 | GPU address based at 0x1EB00000, must be word-aligned |
2 | Size, must be <=0x80 and word-aligned |
The handler for this IPC command expects the following 0x100-bytes after the beginning of the above command buffer:
Index Word | Description |
---|---|
0 | Header code [0x00040080] |
1 | Descriptor for static buffer (id 0) |
2 | Output buffer address |
Response
Index Word | Description |
---|---|
0 | Header code |
1 | Result code |
2 | Descriptor for static buffer (id 0) |
3 | Output data pointer |
Description
The GPU register offset must be <0x420000.