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Line 37:
Line 37:
| u32[10]
| u32[10]
| SVC mode registers, r4-r11, r13, r14
| SVC mode registers, r4-r11, r13, r14
+|-
+| 0xF78
+| f64[16]
+| VFP registers aliased as 16 double precision, 64-bit registers
|-
|-
| 0xFF8
| 0xFF8
| u32
| u32
| FPEXC, floating point exception register for thread- stored and loaded on context switches
| FPEXC, floating point exception register for thread- stored and loaded on context switches
+|-
+| 0xFFC
+| u32
+| FPSCR, floating point status and control register
|}
|}