Y2R Registers: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
No edit summary |
||
| Line 27: | Line 27: | ||
| Y2R_??? | | Y2R_??? | ||
| 0x10102100 | | 0x10102100 | ||
| 0x20 | |||
|- | |||
| Y2R_FIFO | |||
| 0x10102200 | |||
| 0x20 | | 0x20 | ||
|} | |} | ||
Revision as of 01:31, 4 June 2015
Registers
| Name | Address | Width |
|---|---|---|
| Y2R_PARAMS | 0x10102000 | 4 |
| Y2R_LINEW | 0x10102004 | 2 |
| Y2R_LINES | 0x10102006 | 2 |
| Y2R_COEFFICIENTS | 0x10102010 | 0x10 |
| Y2R_ALPHA | 0x10102020 | 2 |
| Y2R_??? | 0x10102100 | 0x20 |
| Y2R_FIFO | 0x10102200 | 0x20 |
Y2R_PARAMS
| BIT | DESCRIPTION |
|---|---|
| 0-3 | InputFormat |
| 8-9 | OutputFormat |
| 10-11 | Rotation |
| 12 | BlockAlignment |
| 15 | ? |
| 16 | ? |
| 17 | ? |
| 21 | ? |
| 22 | ? |
| 24 | ? |
| 25 | ? |
| 26 | ? |
| 27 | ? |
| 28 | ? |
| 29 | ? |
| 30 | Transfer end interrupt |
| 31 | Enable/Busy |