Y2R Registers: Difference between revisions
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| Line 16: | Line 16: | ||
| 0x10102006 | | 0x10102006 | ||
| 2 | | 2 | ||
|- | |||
| Y2R_COEFFICIENTS | |||
| 0x10102010 | |||
| 0x20 | |||
|- | |- | ||
| Y2R_ALPHA | | Y2R_ALPHA | ||
| 0x10102020 | | 0x10102020 | ||
| 2 | | 2 | ||
|- | |||
| Y2R_??? | |||
| 0x10102100 | |||
| 0x20 | |||
|} | |} | ||
| Line 40: | Line 48: | ||
|- | |- | ||
| 15 | | 15 | ||
| | | ? | ||
|- | |- | ||
| 16 | | 16 | ||
| | | ? | ||
|- | |- | ||
| 17 | | 17 | ||
| | | ? | ||
|- | |- | ||
| 21 | | 21 | ||
| | | ? | ||
|- | |- | ||
| 22 | | 22 | ||
| | | ? | ||
|- | |||
| 24 | |||
| ? | |||
|- | |||
| 25 | |||
| ? | |||
|- | |||
| 26 | |||
| ? | |||
|- | |||
| 27 | |||
| ? | |||
|- | |||
| 28 | |||
| ? | |||
|- | |- | ||
| 29 | | 29 | ||
| | | ? | ||
|- | |- | ||
| 30 | | 30 | ||
| Transfer end interrupt | | Transfer end interrupt | ||
|- | |||
| 31 | |||
| Enable/Busy | |||
|} | |} | ||
Revision as of 01:15, 4 June 2015
Registers
| Name | Address | Width |
|---|---|---|
| Y2R_PARAMS | 0x10102000 | 4 |
| Y2R_LINEW | 0x10102004 | 2 |
| Y2R_LINES | 0x10102006 | 2 |
| Y2R_COEFFICIENTS | 0x10102010 | 0x20 |
| Y2R_ALPHA | 0x10102020 | 2 |
| Y2R_??? | 0x10102100 | 0x20 |
Y2R_PARAMS
| BIT | DESCRIPTION |
|---|---|
| 0-3 | InputFormat |
| 8-9 | OutputFormat |
| 10-11 | Rotation |
| 12 | BlockAlignment |
| 15 | ? |
| 16 | ? |
| 17 | ? |
| 21 | ? |
| 22 | ? |
| 24 | ? |
| 25 | ? |
| 26 | ? |
| 27 | ? |
| 28 | ? |
| 29 | ? |
| 30 | Transfer end interrupt |
| 31 | Enable/Busy |