Difference between revisions of "IO Registers"

From 3dbrew
Jump to navigation Jump to search
Line 212: Line 212:
 
|  
 
|  
 
|}
 
|}
 +
 +
IO registers starting at physical address 0x10200000 are not accessible from the ARM9(which includes all LCD/GPU registers).
  
 
=Summary=
 
=Summary=

Revision as of 19:15, 28 February 2014

Overview

Category Physical address start ARM11 process virtual address ARM11 kernel virtual address Comments
CONFIG 0x10000000
IRQ 0x10001000
NDMA 0x10002000
TIMER 0x10003000
CTRCARD 0x10004000 / 0x10005000
SDMC / NAND 0x10006000 / 0x10007000 0x10007000 is apparently not used on retail
PXI 0x10008000
AES 0x10009000
SHA 0x1000A000
RSA 0x1000B000
XDMA 0x1000C000
SPICARD 0x1000D800
CONFIG 0x10010000
HASH 0x10101000 0x1EC01000
CSND 0x10103000 0x1EC03000
DSP 0x10140000 0x1EC40000
PDN 0x10141000 0x1EC41000
CODEC 0x10141000 0x1EC41000
SPI 0x10142000 0x1EC42000
SPI 0x10143000 0x1EC43000 Only used under TWL_FIRM?
I2C 0x10144000 0x1EC44000
CODEC 0x10145000 0x1EC45000
HID 0x10146000 0x1EC46000
PAD 0x10146000 0x1EC46000
PTM 0x10146000 0x1EC46000
? 0x10147000 0x1EC47000 Only used under TWL_FIRM?
I2C 0x10148000 0x1EC48000
SPI 0x10160000 0x1EC60000
I2C 0x10161000 0x1EC61000
MIC 0x10162000 0x1EC62000
PXI 0x10163000 0x1EC63000 0xFFFD2000
NTRCARD 0x10164000
DSP 0x10203000 0x1ED03000
HASH 0x10301000 0x1EE01000

IO registers starting at physical address 0x10200000 are not accessible from the ARM9(which includes all LCD/GPU registers).

Summary