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edits
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Line 354: − bit01: ShellState + − bit03: AdapterState + − bit04: BatteryChargeState + − bit05: Bottom screen backlight on + − bit06: Top screen backlight on + − bit07: GPU on(?) + Line 383:
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Line 779: − LCD controllers for main/sub displays, most likely.+ + + + − ! Width + − + − + − + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + − + − + + + + + + + + + + + + + + + + − + − + − + − + + + + + + + + + + + + + + + + + + + + + + − + − + − + − + − + − + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + − + − + − + − + − + − + Line 973:
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Add and fix MCU-related battery and voltage info
| s
| s
| ro
| ro
| Battery temperature (in Celcius?)
| Internal battery temperature (in Celsius)
|-
|-
| 0x0B
| 0x0B
| s
| s
| ro
| ro
| Battery percentage
| Battery percentage (integer part).
Valid values are in range of 0 to 100 inclusive.
|-
|-
| 0x0C
| 0x0C
| s
| s
| ro
| ro
| Battery percentage, fractional part (seems to have a resolution of around 0.1% according to tests)
| Battery percentage (fractional part).
Seems to have a resolution of around 0.1% according to tests.
To calculate battery charge percentage in full resolution:
MCU[0x0B] + (MCU[0x0C] / 256.0F)
|-
|-
| 0x0D
| 0x0D
| s
| s
| ro
| ro
| System voltage
| System voltage.
This voltage seems to be measured at the load side, so the voltage reading will always be lower than direct probes across the battery due to the various voltage drops in the system by the time the voltage is measured.
To calculate system voltage in Volts:
MCU[0x0D] * 5 / 256.0F
|-
|-
| 0x0E
| 0x0E
| ro
| ro
| Flags: bit7-5 are read via [[MCU_Services|mcu::GPU]]. The rest of them are read via [[MCU_Services|mcu::RTC]].
| Flags: bit7-5 are read via [[MCU_Services|mcu::GPU]]. The rest of them are read via [[MCU_Services|mcu::RTC]].
bit1: ShellState
bit3: AdapterState
bit4: BatteryChargeState
bit5: Bottom screen backlight on
bit6: Top screen backlight on
bit7: LCD panel voltage on
|-
|-
| 0x10
| 0x10
bit09: Charger plugged in
bit09: Charger plugged in
bit10: RTC alarm (when some conditions are met it's sent when the current day and month and year matches the current RTC time)
bit10: RTC alarm (when some conditions are met it's sent when the current day and month and year matches the current RTC time)
bit11: ??? (accelerometer related)
bit11: Accelerometer I2C read/write done [https://github.com/profi200/libn3ds/blob/083c8ffa3f56a49802fa74b6afe45a96820f0439/include/arm11/drivers/mcu_regmap.h#L124]
bit12: HID update
bit12: HID update
bit13: Battery percentage status change (triggered at 10%, 5%, and 0% while discharging)
bit13: Battery percentage status change (triggered at 10%, 5%, and 0% while discharging)
| d
| d
| wo
| wo
| Used to set LCD states
| Used to turn on or turn off LCD-related boost circuits. Bits 5:2 can be read back so see whether backlight setting is in progress or not, however bits 1:0 get cleared as soon as the request gets acknowledged.
bit0: don't push to LCDs
bit0: LCD panel voltage off
bit1: push to LCDs
bit1: LCD panel voltage on
bit2: bottom screen backlight off
bit2: Bottom screen backlight off
bit3: bottom screen backlight on
bit3: Bottom screen backlight on
bit4: top screen backlight off
bit4: Top screen backlight off
bit5: top screen backlight on
bit5: Top screen backlight on
Bits 4 and 5 have no effect on a 2DS because the backlight source is the bottom screen.
Bits 4 and 5 have no effect on a 2DS because the backlight source is the bottom screen.
bytes 6 and 7: Unused
bytes 6 and 7: Unused
bytes 8 to 175: Playtime data for legacy titles
bytes 8 to 175: Playtime data for legacy titles
bytes 176 to 188: Playtime data
bytes 176 to 188: Temporary playtime data in case console doesn't shut down gracefully, updated every 5 minutes
bytes 188 to 199: Unused
bytes 188 to 199: Unused
|-
|-
byte 0x01: PMIC vendor code
byte 0x01: PMIC vendor code
byte 0x02: Battery vendor code
byte 0x02: Battery vendor code
0x00: Maxell
CTR-003 CTR-A-BP (old3DS)
CTR-003 CTR-A-BPMX-C3 (2DS): Wuxi Hitachi Maxell Co.,Ltd.
CTR-003 CTR-A-BPMX-C5 (Switch Pro Controller): Wuxi Maxell Co., Ltd.
SPR-003 SPR-A-BPMX-C3 (new3DSXL): Wuxi Hitachi Maxell Co.,Ltd.
byte 0x03: MGIC version (major?)
byte 0x03: MGIC version (major?)
byte 0x04: MGIC version (minor?)
byte 0x04: MGIC version (minor?)
byte 0x05: RCOMP(?)
byte 0x05: RCOMP(?)
byte 0x06: battery related? (seems to decrease while charging and increase while discharging)
byte 0x06: Battery middle terminal NTC reading (more heat causes this value to go *down*, and cooling off will make this value go back up)
byte 0x09: system model (see [[Cfg:GetSystemModel#System_Model_Values|Cfg:GetSystemModel]] for values)
byte 0x09: system model (see [[Cfg:GetSystemModel#System_Model_Values|Cfg:GetSystemModel]] for values)
byte 0x0A: Red Power LED mode (0 = off, 1 = on)
byte 0x0A: Red Power LED mode (0 = off, 1 = on)
== Device 5 & 6 ==
== Device 5 & 6 ==
These are the chip-on-glass display controllers, also known as I2CLCD.
=== Shared registers ===
These registers are the same across all known I2CLCD controllers (except Controller ID 0x00).
{| class="wikitable" border="1"
{| class="wikitable" border="1"
! Register
! Register
! Name
! Name
! Valid bits
! Description
! Description
|-
|-
| 0x1
| 0x01
| 8
| Display enable
| ?
| 0x11
| Values:
- 0x00 - screen off, slow burn-in
- 0x01 - screen off, fast burn-in
- 0x10 - screen on, color input used
- 0x11 - screen on, color input not used, High-Z (display turns black or white depending on interface config)
|-
| 0x40
| Read address
|
| Write to this register to set the read address.
Reading from I2CLCD is non-standard. When you read, it returns pairs of the currently read address, and then the data byte at that address. The read address auto-increments.
|-
| 0x54
| Checksum? trigger
| 0x01
| When transitioning bit0 from 0 to 1, it seems to trigger some sort of checksum calcuation. Broken on controller 0x01, where it's oneshot.
|-
| 0x55
| ???
| 0x03 (all) /
0x07 (2DS)
| Unknown. When toggling 0x54 bit0 from 0 to 1, this register gets changed to 0x01 (all) / 0x05 (2DS).
This register is sometimes seen with a value of 0x02 at initialization time on the top screen.
|-
| 0x56
| Checksum?
|
| Unknown. Read-writable with no effect (old3DS) / read-only (all).
A random value is written here when 0x54 bit0 is changed from 0 to 1. Constantly updates with a seemingly random value, except on Controller ID 0x01, where it's oneshot/bugged.
|-
| 0x60
| ???
| 0x01
| Unknown. 0x00 is written here during init. Seems to have no effect.
|-
| 0x61
| Register checksum
|
| Some - but not all - register values are combined using an unknown algorithm into this register.
It's unknown which registers influence this value, as some registers which influence this value are read-only.
|-
| 0x62
| ???
| 0x01
| Unknown, does nothing on known controllers. During init, gsp waits for this to become 0x01.
|-
| 0xFE
| ???
|
|
| Unknown, does nothing. 0xAA is written here during init.
|-
| 0xFF
| Controller ID
|
| Upper 4bits is manufacturer. Lower 4bits is unknown, most likely revision, possibly encoded as a Johnson counter. The fields are encoded this way, most likely for the register checksum feature.
Manufacturers:
- 0x0 - SHARP (LTPS(?) TN), old I2CLCD, found in old3DS (non-XL) only
- 0x1 - JDI (LTPS IPS), found in select new3DS and new3DSXL consoles
- 0xC - SHARP (LTPS(?) TN), new I2CLCD
- 0xE - SHARP (TFT), found in 2DS only
Known IDs:
- 0xC7 - new3DS, new3DSXL, new2DSXL, and some select newer old3DSXL
- 0xC3 - older old3DSXL
- 0xE1 - 2DS
- LQ050B1LW10B
- LQ = normal TFT
- 050 = panel 5 inches diagonal
- B = "other" display format
- 1 = transmissive (backlight-compatible)
- L = LVDS
- W = *unknown coating type*
- 10 = model number
- B = *unknown suffix*
- 0x10 - some select new3DS and new3DSXL with IPS screens
- 0x01 - old3DS
- LS035T7LE38P (top screen)
- LS = TFT (LTPS or SI-TFT ?)
- 035 = panel 3.5 inches diagonal
- T = "other 16:9" (even though the panel is 16:10 in physical size, or 32:10 in terms of pixel count)
- 7 = *unknown backing type*
- L = LVDS
- E = *unknown coating type*
- 38 = model number
- P = *unknow suffix*
- LS030Q7DW48P (bottom screen)
- LS = TFT (LTPS or SI-TFT ?)
- 030 = panel 3 inches diagonal
- Q = QVGA (320x240)
- 7 = *unknown backing type*
- D = parallel RGB (unspecified, but it's known to be RGB888 for this display)
- W = *unknown coating type*
- 48 = model number
- P = *unknow suffix*
- 0x00 - no controller, or dead (I2CLCD always ACKs reads, but returns 00 if dead)
|}
=== Custom registers for controller 0x00 ===
This Controller ID is fully unknown, and the only reason we know about its existance is due to gsp having special handling code for it.
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
|-
| 0x11
| 0x11
| 8
| ???
| ?
|
| Unknown. Write 0x10 to initialize.
|-
| 0x50
| ???
|
|
| Unknown. Write 0x01 to initialize.
|}
=== Custom registers for controller 0x01 ===
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
|-
| 0x40
| 0x10
| 8
| Interface config
| CMD_IN/CMD_RESULT1
| 0xF7
| Write to trigger a command? Seen commands: 0xFF=Reset?, 0x62=IsFinished?. Result is stored in CMD_RESULT1:CMD_RESULT0.
| Regonfigures the input pins and pin behavior of the controller.
bit0 - color value invert (D = ~D, or D = 255 - D)
bit1 - color format remap (D7:D2 <-- D5:D0, that is left shift color data by 2)
bit2 - ???
bit4 - ???
bit5 - ???
bit6 - ???
bit7 - DS-style undriven screen (it will be white instead of black, see shared register 0x01)
|-
| 0x11
| Image config
| 0x7F
| Image filters and pixel clock control.
bit0 - Horizontal Flip (scan from right to left)
bit1 - red-blue swap
bit2 - ???
bit3 - ???
bit4 - ???
bit5 - ???
bit6 - ???
|-
|-
| 0x41
| 0x1D
| 8
| ???
| CMD_RESULT0
| 0x0F
| Read result
| Unknown, bit0 enables registers 0x12 to 0x19 to control some analog timing controls to the display panel itself.
|-
|-
| 0x50
| 0x50
| 8
| ???
| ?
| 0x11
| Unknown. Has no effect on bottom screen. On the top screen, bit4 blanks out the display (LVDS disable?).
|-
| 0x53
| ???
| 0x73
| Unknown. While other bits seem to have no effect, bit0 kills the controller until a power cycle.
|}
=== Custom registers for controller 0xC3 ===
Basically the same as Controller ID 0xC7.
=== Custom registers for controller 0xC7 ===
This is the most common non-old3DS display controller. Quite overclockable.
Note: on the 0xC7 controller unlocking the factory controls at register 0x03 glitches out most of the standard controls (like registers 0x50 to 0x56), so use with caution.
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
| 0x03
| Factory key 2
|
| Write 0xAA here to unlock a second set of factory controls.
|-
| 0xAF
| Factory key
|
| Write 0xAA here to unlock factory controls.
|}
Factory mode registers for unlock register 0x03:
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
| 0x10
| Image control?
| 0xD7
| Most bits are unknown.
bit0 - color invert
bit1 - slight gamma increase
|-
| 0x11
| Image transform?
| 0x7F
| Mostly unknown.
bit0 - Invert horizontal scan direction (0 = left to right, 1 = right to left)
bit1 - red-blue swap
bit2 - Invert vertical scan direction (0 = top to bottom, 1 = bottom to top)
bit3 - Invert the order of each scanline pair (might be needed if bit2 is toggled)
bit4 - Enable interlaced signal (use bit3 to swap fields)
bit5 - ???
bit6 - ???
|-
| 0x70-0x83
| Color curve red
| rowspan=3 |
| rowspan=3 | These registers are used for fine-tuning the analog driving curve of the screen
Positive:
- byte 00 (0xFF) - ???
- byte 01 (0xFF) - ???
- byte 02 (0x3F) - ???
- byte 03 (0x3F) - ???
- byte 04 (0x3F) - ???
- byte 05 (0x3F) - ???
- byte 06 (0x3F) - ???
- byte 07 (0x3F) - ???
- byte 08 (0x3F) - ???
- byte 09 (0x3F) - ???
Negative:
- byte 10 (0xFF) - ???
- byte 11 (0xFF) - ???
- byte 12 (0x3F) - ???
- byte 13 (0x3F) - ???
- byte 14 (0x3F) - ???
- byte 15 (0x3F) - ???
- byte 16 (0x3F) - ???
- byte 17 (0x3F) - ???
- byte 18 (0x3F) - ???
- byte 19 (0x3F) - ???
|-
| 0x84-0x97
| Color curve green
|-
| 0x98-0xAB
| Color curve blue
|}
=== Custom registers for controller 0xE1 ===
This controller is designed to drive a split panel. As such, the factory controls have been slightly altered to accomodate this.
This is the only I2CLCD which responds on both I2CLCD addresses. The dominant screen is the bottom one.
Most registers are similar to controller 0xC7, but there are some differences due to the split shared panel nature.
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
| 0x03
| Factory key 2
|
| Write 0xAA here to unlock a 2nd set of factory controls.
|-
| 0xAF
| Factory key
|
| Write 0xAA here to unlock factory controls.
|}
Factory mode registers for unlock register 0x03:
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
| 0x10
| Image control?
| 0xD7
| Most bits are unknown. This applies to the whole display panel.
bit0 - color invert
bit1 - slight gamma increase
|-
| 0x11
| Image transform
| 0x33
|
bit0 - top half horizontal flip
bit1 - top half red-blue swap
bit4 - bottom half horizontal flip
bit5 - bottom half red-blue swap
|-
| 0x70-0x83
| Analog curve top
| rowspan=2 |
| rowspan=2 | Consists of two unknown curve values. Seems to be nonstandard.
Pair 1:
byte 00 (0xFF) - ???
byte 01 (0xFF) - ???
byte 02 (0xFF) - ???
byte 03 (0xFF) - ???
byte 04 (0x3F) - ???
byte 05 (0x3F) - ???
byte 06 (0x3F) - ???
byte 07 (0x3F) - ???
byte 08 (0x3F) - ???
byte 09 (0x3F) - ???
Part 2:
byte 10 (0xFF) - ???
byte 11 (0xFF) - ???
byte 12 (0xFF) - ???
byte 13 (0xFF) - ???
byte 14 (0x3F) - ???
byte 15 (0x3F) - ???
byte 16 (0x3F) - ???
byte 17 (0x3F) - ???
byte 18 (0x3F) - ???
byte 19 (0x3F) - ???
|-
| 0x84-0x97
| Analog curve bottom
|}
=== Custom registers for controller 0x10 ===
JDI IPS controller.
Warning: on the JDI controller, unlocking any of the factory mode registers overshadows some other registers, so don't write to "standard" locations (other than register 0x40) before locking factory mode back!
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
| 0x03
| Factory key 2
|
| Write 0xAA here to unlock advanced IPS curve controls.
|-
| 0xAF
| Factory key
|
| Write 0xAA here to unlock factory controls.
|}
Factory mode registers unlocked by register 0xAF:
* 0x41 - 0x4F
* 0x58 - 0x5F
* 0x67 - 0x6F
* 0xD0 - 0xEF
* unknown...
Factory mode registers unlocked by register 0x03:
* 0x04 - 0x0F
* unknown...
{| class="wikitable" border="1"
! Register
! Name
! Valid bits
! Description
|-
| 0x70-0x7F
| Driving curve 1-1
|
|
|-
| 0x80-0x8F
| Driving curve 1-2
|
|
|-
| 0x90-0x9F
| Driving curve 2-1
|
|
|-
| 0xA0-0xAF
| Driving curve 2-2
|
|
|
|-
|-
| 0x60
| 0xB0-0xBF
| 8
| Driving curve 3-1
| ?
|
|
|
|-
|-
| 0xFE
| 0xC0-0xCF
| 8
| Driving curve 3-2
| ?
|
|
|
|}
|}
| Firmware image for this chunk, size varies.
| Firmware image for this chunk, size varies.
| This is used during NFC module startup to upload the firmware image to the NFC controller. This is used repeatedly to upload multiple chunks of the image.
| This is used during NFC module startup to upload the firmware image to the NFC controller. This is used repeatedly to upload multiple chunks of the image.
|}
== Device 17 ==
(Stub)
Used by New 3DS for ZL, ZR, C stick
This device do not use registers. After writing the address, read the next several bytes.
{| class="wikitable" border="1"
! Offset
! Description
|-
| 0x0
| Fixed 0x80
|-
| 0x1
| Buttons (ZL = 0x4, ZR = 0x2)
|}
|}