Difference between revisions of "IO Registers"
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Line 11: | Line 11: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A9 | | A9 | ||
− | | [[ | + | | [[CONFIG9 Registers]] |
| 0x10000000 | | 0x10000000 | ||
| Boot9, Process9 | | Boot9, Process9 | ||
Line 28: | Line 28: | ||
| 0x10002000 | | 0x10002000 | ||
| Boot9, Process9 | | Boot9, Process9 | ||
− | | DMA Engine | + | | AHB DMA Engine |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 48: | Line 48: | ||
| [[EMMC Registers]] | | [[EMMC Registers]] | ||
| 0x10006000 / 0x10007000 | | 0x10006000 / 0x10007000 | ||
− | | Boot9, Process9 | + | | Boot9, Process9, NewKernel9Loader |
− | | | + | | SD(IO) controller 1 and 3. 3 is normally mapped to ARM11. |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 62: | Line 62: | ||
| [[AES Registers]] | | [[AES Registers]] | ||
| 0x10009000 | | 0x10009000 | ||
− | | Boot9, Process9 | + | | Boot9, Process9, NewKernel9Loader |
| | | | ||
|- | |- | ||
Line 69: | Line 69: | ||
| [[SHA Registers]] | | [[SHA Registers]] | ||
| 0x1000A000 | | 0x1000A000 | ||
− | | Boot9, Process9 | + | | Boot9, Process9, NewKernel9Loader |
| | | | ||
|- | |- | ||
Line 81: | Line 81: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A9 | | A9 | ||
− | | [[XDMA Registers]] | + | | [[Corelink DMA Engines|XDMA Registers]] |
| 0x1000C000 | | 0x1000C000 | ||
| Boot9, Kernel9 | | Boot9, Kernel9 | ||
− | | [http://infocenter.arm.com/help/topic/com.arm.doc. | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (AXI busmaster, two channels, uses 32-bit bus width instead of 64). |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 94: | Line 94: | ||
|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
− | | | + | | A9 |
| [[CONFIG Registers]] | | [[CONFIG Registers]] | ||
| 0x10010000 | | 0x10010000 | ||
Line 101: | Line 101: | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
− | | | + | | A9 |
| PRNG Registers | | PRNG Registers | ||
| 0x10011000 | | 0x10011000 | ||
− | | Process9 | + | | Boot9, Process9 |
| Used as entropy-source for seeding random number generators. | | Used as entropy-source for seeding random number generators. | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
− | | | + | | A9 |
| [[OTP Registers]] | | [[OTP Registers]] | ||
| 0x10012000 | | 0x10012000 | ||
− | | Kernel9, NewKernel9Loader | + | | Boot9, Kernel9, NewKernel9Loader |
| Top secret. | | Top secret. | ||
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
− | | | + | | A9 |
− | | | + | | [[ARM7|ARM7 Registers]] |
| 0x10018000 | | 0x10018000 | ||
| TwlProcess9 | | TwlProcess9 | ||
Line 122: | Line 122: | ||
|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
− | | | + | | A11/A9 |
− | | | + | | TMIO SD(IO) controller 3 |
| 0x10100000 | | 0x10100000 | ||
− | | | + | | |
− | | | + | | NWM references this controller but doesn't have access to it. |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 133: | Line 133: | ||
| 0x10101000 | | 0x10101000 | ||
| [[Filesystem services]] | | [[Filesystem services]] | ||
− | | | + | | These registers function the same as the [[SHA Registers]], with the exception of the FIFO being located at 0x10301000. |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | [[ | + | | [[Y2R Registers]] |
| 0x10102000 | | 0x10102000 | ||
| [[Camera Services]] | | [[Camera Services]] | ||
Line 144: | Line 144: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | [[CSND | + | | [[CSND Registers]] |
| 0x10103000 | | 0x10103000 | ||
| TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]] | | TwlBg, [[Codec Services]], [[CSND Services]], [[DSP Services]] | ||
− | | Sound hardware | + | | Sound hardware. |
|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | | + | | [[MTX_Registers|LgyFb bottom screen]] |
| 0x10110000 | | 0x10110000 | ||
| TwlBg | | TwlBg | ||
Line 158: | Line 158: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | | + | | [[MTX_Registers|LgyFb top screen]] |
| 0x10111000 | | 0x10111000 | ||
| TwlBg | | TwlBg | ||
Line 179: | Line 179: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | | + | | [[WIFI Registers]] |
| 0x10122000 | | 0x10122000 | ||
| [[NWM Services]] | | [[NWM Services]] | ||
− | | WIFI | + | | WIFI SDIO bus registers |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | |? | + | | ? |
| 0x10123000 | | 0x10123000 | ||
| [[NWM Services]] | | [[NWM Services]] | ||
Line 214: | Line 214: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | [[ | + | | [[CONFIG11 Registers]] |
| 0x10140000 | | 0x10140000 | ||
| Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]] | | Process9, Boot11, Kernel11, TwlBg, [[DSP Services]], [[NWM Services]], [[SPI Services]] | ||
− | | | + | | System configuration. |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 237: | Line 237: | ||
| [[SPI Registers]] | | [[SPI Registers]] | ||
| 0x10143000 | | 0x10143000 | ||
− | | TwlBg | + | | TwlBg, dmnt Module |
− | | | + | | Debugger related? |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 245: | Line 245: | ||
| 0x10144000 | | 0x10144000 | ||
| Boot11, Kernel11, TwlBg, [[I2C Services]] | | Boot11, Kernel11, TwlBg, [[I2C Services]] | ||
− | | | + | | 3DS I2C interface (MCU + Cameras + LCD) |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11/A9 | | A11/A9 | ||
− | | [[ | + | | [[I2S Registers]] |
| 0x10145000 | | 0x10145000 | ||
− | | TwlBg, [[Codec Services]] | + | | TwlBg, AgbBg, [[Codec Services]] |
− | | | + | | Sound input/output lines |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 258: | Line 258: | ||
| [[HID Registers]] | | [[HID Registers]] | ||
| 0x10146000 | | 0x10146000 | ||
− | | Boot11, Kernel11, TwlBg, [[HID Services]], dlp Services | + | | Boot9, Boot11, Kernel11, TwlBg, [[HID Services]], dlp Services |
| See [[PAD]]. | | See [[PAD]]. | ||
|- | |- | ||
Line 273: | Line 273: | ||
| 0x10148000 | | 0x10148000 | ||
| TwlBg, [[I2C Services]] | | TwlBg, [[I2C Services]] | ||
− | | | + | | 3DS I2C interface (Gyro + IR) |
|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 287: | Line 287: | ||
| 0x10161000 | | 0x10161000 | ||
| Boot11, TwlBg, [[I2C Services]] | | Boot11, TwlBg, [[I2C Services]] | ||
− | | | + | | TWL I2C interface (MCU + Cameras) |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
Line 382: | Line 382: | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11 | | A11 | ||
− | | CDMA | + | | [[Corelink DMA Engines|CDMA]] |
| 0x10200000 | | 0x10200000 | ||
| Boot11, Kernel11 | | Boot11, Kernel11 | ||
− | | [http://infocenter.arm.com/help/topic/com.arm.doc. | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.subset.primecell.system/index.html CoreLink™ DMA-330 r0p0] (eight channels). Only used by bootrom on New3DS. |
|- | |- | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11 | | A11 | ||
− | | | + | | FCRAM configuration |
| 0x10201000 | | 0x10201000 | ||
− | | | + | | TwlBg, Kernel11 (dead code) |
| | | | ||
|- | |- | ||
Line 406: | Line 406: | ||
| 0x10203000 | | 0x10203000 | ||
| [[DSP Services]] | | [[DSP Services]] | ||
− | | | + | | see the "DSi XpertTeak" section in [http://problemkaputt.de/gba.htm no$gba] help. |
− | |- | + | |-style="border-top: double" |
− | | style="background: | + | | style="background: red" | No |
| A11 | | A11 | ||
| ? | | ? | ||
| 0x10204000 | | 0x10204000 | ||
+ | | ? | ||
| | | | ||
− | + | |- | |
− | |- | ||
| style="background: red" | No | | style="background: red" | No | ||
| A11 | | A11 | ||
− | | CDMA | + | | [[Corelink DMA Engines|CDMA]] |
| 0x10206000 | | 0x10206000 | ||
| NewKernel11 | | NewKernel11 | ||
− | | | + | | [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424d/index.html CoreLink™ DMA-330 r1p2] (eight channels). This is the DMA engine actually being used by the New3DS ARM11 kernel. |
|- | |- | ||
| style="background: red" | No | | style="background: red" | No | ||
Line 434: | Line 434: | ||
| 0x1020F000 | | 0x1020F000 | ||
| TwlBg, [[GSP Services]] | | TwlBg, [[GSP Services]] | ||
− | | [ | + | | [https://developer.arm.com/documentation/ddi0422/d/programmers-model/register-summary CoreLink™ NIC-301 r1p2]. |
|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11 | | A11 | ||
− | | | + | | AHB (or AXI?) FIFOs region |
− | | 0x10300000- | + | | 0x10300000-0x10340000 |
| | | | ||
− | | | + | | Pages present in this region correspond to the same respective devices in the 0x10100000-0x10140000 region but don't hold the same registers. They hold the FIFOs instead: the HASH FIFO register is located at 0x10301000. The LgyFb scaler data FIFO are located at 0x10310000 (top) and 0x10311000 (bot), etc. Needed for DMA. |
|-style="border-top: double" | |-style="border-top: double" | ||
| style="background: green" | Yes | | style="background: green" | Yes | ||
| A11 | | A11 | ||
− | | [[GPU Registers]] | + | | [[GPU/External_Registers|GPU Registers]] |
| 0x10400000 | | 0x10400000 | ||
| Boot11, Kernel11, [[GSP Services]] | | Boot11, Kernel11, [[GSP Services]] |
Latest revision as of 07:52, 18 October 2023
Overview[edit]
Old3DS | A9/A11 | Category | Physaddr | Used by | Comments |
---|---|---|---|---|---|
Yes | A9 | CONFIG9 Registers | 0x10000000 | Boot9, Process9 | |
Yes | A9 | IRQ Registers | 0x10001000 | Boot9, Process9, Kernel9 | ARM9 Interrupt Masking |
Yes | A9 | NDMA Registers | 0x10002000 | Boot9, Process9 | AHB DMA Engine |
Yes | A9 | TIMER Registers | 0x10003000 | Boot9, Process9 | |
Yes | A9 | CTRCARD Registers | 0x10004000 / 0x10005000 | Process9 | |
Yes | A9 | EMMC Registers | 0x10006000 / 0x10007000 | Boot9, Process9, NewKernel9Loader | SD(IO) controller 1 and 3. 3 is normally mapped to ARM11. |
Yes | A9 | PXI Registers | 0x10008000 | Boot9, Process9 | |
Yes | A9 | AES Registers | 0x10009000 | Boot9, Process9, NewKernel9Loader | |
Yes | A9 | SHA Registers | 0x1000A000 | Boot9, Process9, NewKernel9Loader | |
Yes | A9 | RSA Registers | 0x1000B000 | Boot9, Process9 | |
Yes | A9 | XDMA Registers | 0x1000C000 | Boot9, Kernel9 | CoreLink™ DMA-330 r0p0 (AXI busmaster, two channels, uses 32-bit bus width instead of 64). |
Yes | A9 | SPICARD Registers | 0x1000D800 | Process9 | |
Yes | A9 | CONFIG Registers | 0x10010000 | Process9 | |
Yes | A9 | PRNG Registers | 0x10011000 | Boot9, Process9 | Used as entropy-source for seeding random number generators. |
Yes | A9 | OTP Registers | 0x10012000 | Boot9, Kernel9, NewKernel9Loader | Top secret. |
Yes | A9 | ARM7 Registers | 0x10018000 | TwlProcess9 | Used to setup the ARM7 core for AGB/TWL |
Yes | A11/A9 | TMIO SD(IO) controller 3 | 0x10100000 | NWM references this controller but doesn't have access to it. | |
Yes | A11/A9 | HASH Registers | 0x10101000 | Filesystem services | These registers function the same as the SHA Registers, with the exception of the FIFO being located at 0x10301000. |
Yes | A11/A9 | Y2R Registers | 0x10102000 | Camera Services | y2r |
Yes | A11/A9 | CSND Registers | 0x10103000 | TwlBg, Codec Services, CSND Services, DSP Services | Sound hardware. |
Yes | A11/A9 | LgyFb bottom screen | 0x10110000 | TwlBg | IO registers used to access legacy output framebuffer, as well as configure the upscaling filter. |
Yes | A11/A9 | LgyFb top screen | 0x10111000 | TwlBg | IO registers used to access legacy output framebuffer, as well as configure the upscaling filter. |
Yes | A11/A9 | Camera Registers | 0x10120000 | Camera Services | |
Yes | A11/A9 | Camera Registers | 0x10121000 | Camera Services | Mirror of 0x10120000? |
Yes | A11/A9 | WIFI Registers | 0x10122000 | NWM Services | WIFI SDIO bus registers |
Yes | A11/A9 | ? | 0x10123000 | NWM Services | WIFI? |
No | A11/A9 | MVD Registers | 0x10130000 | MVD Services | |
No | A11/A9 | MVD Registers | 0x10131000 | MVD Services | |
No | A11/A9 | MVD Registers | 0x10132000 | MVD Services | |
Yes | A11/A9 | CONFIG11 Registers | 0x10140000 | Process9, Boot11, Kernel11, TwlBg, DSP Services, NWM Services, SPI Services | System configuration. |
Yes | A11/A9 | PDN Registers | 0x10141000 | Process9, Boot11, Kernel11, TwlBg, Codec Services, NWM Services, SPI Services, PDN Services | Power management |
Yes | A11/A9 | SPI Registers | 0x10142000 | TwlBg, SPI Services | |
Yes | A11/A9 | SPI Registers | 0x10143000 | TwlBg, dmnt Module | Debugger related? |
Yes | A11/A9 | I2C Registers | 0x10144000 | Boot11, Kernel11, TwlBg, I2C Services | 3DS I2C interface (MCU + Cameras + LCD) |
Yes | A11/A9 | I2S Registers | 0x10145000 | TwlBg, AgbBg, Codec Services | Sound input/output lines |
Yes | A11/A9 | HID Registers | 0x10146000 | Boot9, Boot11, Kernel11, TwlBg, HID Services, dlp Services | See PAD. |
Yes | A11/A9 | GPIO Registers | 0x10147000 | Boot11, TwlBg, GPIO Services, DSP Services(v0) | |
Yes | A11/A9 | I2C Registers | 0x10148000 | TwlBg, I2C Services | 3DS I2C interface (Gyro + IR) |
Yes | A11/A9 | SPI Registers | 0x10160000 | Boot9, TwlBg, SPI Services | |
Yes | A11/A9 | I2C Registers | 0x10161000 | Boot11, TwlBg, I2C Services | TWL I2C interface (MCU + Cameras) |
Yes | A11/A9 | MIC Registers | 0x10162000 | MIC Services | |
Yes | A11/A9 | PXI Registers | 0x10163000 | Boot11, Kernel11, TwlBg, PXI Services | |
Yes | A11/A9 | NTRCARD Registers | 0x10164000 | Boot9, Process9 | |
Yes | A11/A9 | MP Registers | 0x10165000 | MP Services | |
Yes | A11/A9 | MP Registers | 0x10170000 | MP Services | NTR WIFI Registers, see GBATek. |
Yes | A11/A9 | MP Registers | 0x10171000 | MP Services | NTR WIFI Registers (mirror) |
Yes | A11/A9 | ? | 0x10172000 | ? | NTR WIFI Unused? |
Yes | A11/A9 | ? | 0x10173000 | ? | NTR WIFI Unused? |
Yes | A11/A9 | MP Registers | 0x10174000 | MP Services | NTR WIFI RAM |
Yes | A11/A9 | MP Registers | 0x10175000 | ? | NTR WIFI RAM |
Yes | A11/A9 | MP Registers | 0x10176000 | ? | NTR WIFI Registers (mirror) |
Yes | A11/A9 | MP Registers | 0x10177000 | ? | NTR WIFI Registers (mirror) |
Yes | A11/A9 | MP Registers | 0x10178000 - 0x10180000 | MP Services | NTR WIFI WS1 Region |
Yes | A11 | CDMA | 0x10200000 | Boot11, Kernel11 | CoreLink™ DMA-330 r0p0 (eight channels). Only used by bootrom on New3DS. |
Yes | A11 | FCRAM configuration | 0x10201000 | TwlBg, Kernel11 (dead code) | |
Yes | A11 | LCD Registers | 0x10202000 | TwlBg, Kernel11, GSP Services | |
Yes | A11 | DSP Registers | 0x10203000 | DSP Services | see the "DSi XpertTeak" section in no$gba help. |
No | A11 | ? | 0x10204000 | ? | |
No | A11 | CDMA | 0x10206000 | NewKernel11 | CoreLink™ DMA-330 r1p2 (eight channels). This is the DMA engine actually being used by the New3DS ARM11 kernel. |
No | A11 | MVD Registers | 0x10207000 | MVD Services | New 3DS only? |
Yes | A11 | AXI | 0x1020F000 | TwlBg, GSP Services | CoreLink™ NIC-301 r1p2. |
Yes | A11 | AHB (or AXI?) FIFOs region | 0x10300000-0x10340000 | Pages present in this region correspond to the same respective devices in the 0x10100000-0x10140000 region but don't hold the same registers. They hold the FIFOs instead: the HASH FIFO register is located at 0x10301000. The LgyFb scaler data FIFO are located at 0x10310000 (top) and 0x10311000 (bot), etc. Needed for DMA. | |
Yes | A11 | GPU Registers | 0x10400000 | Boot11, Kernel11, GSP Services |
IO registers starting at physical address 0x10200000 are not accessible from the ARM9 (which includes all LCD/GPU registers). It seems IO registers below physical address 0x10100000 are not accessible from the ARM11 bus.
ARM11 kernel virtual address mappings for these registers varies for different builds. For ARM11 user mode applications you have:
physaddr = virtaddr - 0x1EC00000 + 0x10100000