GSP Shared Memory: Difference between revisions

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 =Interrupt info=
 The Interrupt info structure is located at sharedmemvadr + process_gsp_index*0x40.
-It is a list of interrupts (id's 0-6 exist).
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 |-
 | 0x0
-| Index of the last processed data (field size is 0x33) (must be updated manually)
+| Offset from the count where to save incoming interrupts
 |-
 | 0x1
-| To be processed datafields, (max 0x20 for PDC interrupts else the missed PDC filds are used,max 0x34 for all other if more interrupts happen and the Errorflag is 0 the Errorflag is set to 1)
+| Count (max 0x20 for PDC, 0x34 for others)
 |-
 | 0x2
-| Errorflag (if the first bit of Errorflag is set future PDC interrupts are ignored)
+| Missed other interrupts (set to 1 when 0 and count >= 0x34)
 |-
 | 0x3
-| not used
+| Flags (bit0 = skip PDC)
 |-
 | 0x4-0x7
-| missed PDC0
+| Missed PDC0 (incremented when flags.bit0 is clear and count >= 0x20)
 |-
 | 0x8-0xB
-| missed PDC1
+| Missed PDC1 (same as above)
 |-
 | 0xC-0x3F
-| u8 Interrupttypefield (0=PSC0, 1=PSC1, 2=PDC0/VBlankTop (sent to all threads), 3=PDC1/VBlankBottom (sent to all threads), 4=PPF, 5=P3D, 6=DMA)
+| Interrupt list (u8) (0=PSC0, 1=PSC1, 2=PDC0/VBlankTop, 3=PDC1/VBlankBottom, 4=PPF, 5=P3D, 6=DMA)
 |}
+GSP fills the interrupt list, then triggers the event set with [[GSPGPU:RegisterInterruptRelayQueue|RegisterInterruptRelayQueue]] for the specified process(es).
+PDC interrupts are sent to all processes; other interrupts are only sent to the process with GPU rights.
 =Framebuffer info=