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62 bytes added ,  18:07, 9 January 2021
Line 277: Line 277:  
   bit0: RTC clock value got reset to defaults
 
   bit0: RTC clock value got reset to defaults
 
   bit1: Watchdog reset happened
 
   bit1: Watchdog reset happened
   bit5: TWL volume mode (0: 8-step, 1: 32-step)
+
   bit5: TWL MCU reg: volume mode (0: 8-step, 1: 32-step)
   bit6: Is in TWL mode
+
   bit6: TWL MCU reg: NTR (0) vs TWL mode (1)
 +
  bit7: TWL MCU reg: Uses NAND
 
|-
 
|-
 
| 0x03
 
| 0x03

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