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543 bytes added ,  14:02, 21 September 2019
Line 57: Line 57:  
!  Description
 
!  Description
 
|-
 
|-
| RTC_CNT (?)
+
| RTC_CNT
 
| 0x10147100
 
| 0x10147100
 
| 2
 
| 2
| ???
+
| 0x8000 = enabled?, 0x4000 = latch, other bits are to-be-latched bits in order of the regs below, starting from bit 0. TIME1 and TIME2 are one bit (0x10) together
 
|-
 
|-
 
| RTC_REG_STAT1
 
| RTC_REG_STAT1
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| The free general purpose rtc register (command 7). Bitswapped
 
| The free general purpose rtc register (command 7). Bitswapped
 
|-
 
|-
| RTC_RAW
+
| RTC_REG_TIME1
 
| 0x10147120
 
| 0x10147120
 
| 4
 
| 4
| Byte-wise bit-swapped (bit7 is bit0, etc.) BCD RTC (byte0 = seconds, byte1 = minutes, byte2 = hours, byte3 = day(?))
+
| Byte-wise bit-swapped (bit7 is bit0, etc.) BCD RTC (byte0 = seconds, byte1 = minutes, byte2 = hours, byte3 = day of week)
 
|-
 
|-
| RTC_?
+
| RTC_REG_TIME2
 
| 0x10147124
 
| 0x10147124
| 4
+
| 4 (3?)
| RTC offset?
+
| Day, month and year all byte-wise bit-swapped
 
|-
 
|-
| RTC_?
+
| RTC_REG_ALRMTIM1
 
| 0x10147130
 
| 0x10147130
| 4
+
| 4 (3?)
| ???
+
| Rtc alarm time register 1 (command 4). Byte-wise bit-swapped
 
|-
 
|-
| RTC_?
+
| RTC_REG_ALRMTIM2
 
| 0x10147134
 
| 0x10147134
| 4
+
| 4 (3?)
| ???
+
| Rtc alarm time register 2 (command 5). Byte-wise bit-swapped
 
|-
 
|-
| RTC_?
+
| RTC_REG_COUNT
 
| 0x10147140
 
| 0x10147140
| 4
+
| 4 (3?)
| Some sort of byte-wise bit-swapped seconds counter
+
| Rtc dsi counter register (ex command 0). Byte-wise bit-swapped
 
|-
 
|-
 
| RTC_REG_FOUT1
 
| RTC_REG_FOUT1
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| Rtc dsi fout register 2 (ex command 2). Bitswapped
 
| Rtc dsi fout register 2 (ex command 2). Bitswapped
 
|-
 
|-
| RTC_?
+
| RTC_REG_ALRMDAT2
 
| 0x10147160
 
| 0x10147160
| 4
+
| 4 (3?)
| ???
+
| Rtc dsi alarm date register 1 (ex command 4). Byte-wise bit-swapped
 
|-
 
|-
| RTC_?
+
| RTC_REG_ALRMDAT2
 
| 0x10147164
 
| 0x10147164
| 4
+
| 4 (3?)
| ???
+
| Rtc dsi alarm date register 2 (ex command 5). Byte-wise bit-swapped
 
|-
 
|-
 
|}
 
|}
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